Differential Amplifier Circuit With Common-Mode Capacitive Attenuation
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Solution Overview
Problem
Conventional amplifier circuits fail to completely eliminate common-mode signals, leading to saturation issues due to mismatch between terminals and DC offsets, which limits the amplification of differential-mode signals in applications like electrocardiograms.
Innovation Solution
An amplifier circuit with an amplifying unit and an attenuation unit, including positive and negative common-mode capacitors, that attenuates common-mode voltage below a specific frequency, increasing the common-mode rejection ratio (CMRR) and filtering out DC offsets.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If conventional amplifier circuit with fixed differential-mode signal gain and unit common-mode signal gain is used, then the circuit structure is simple, but the common-mode rejection ratio is insufficient due to terminal mismatch
Solution Approach 1:
The amplifier circuit is segmented into distinct functional blocks: a first amplifying unit for differential-mode signals, a second amplifying unit for common-mode signals, and a subtraction circuit. This segmentation allows independent optimization of each function, enabling high common-mode rejection ratio while maintaining manageable circuit complexity through modular design.
2Device complexity
If conventional amplifier circuit is used, then the circuit design is simple, but the amplifier saturates easily due to common-mode signal occupying voltage range
Solution Approach 1:
The common-mode signal is extracted and processed separately from the differential-mode signal through the second amplifying unit. By taking out the common-mode component and amplifying it independently, then subtracting it from the total signal, the circuit prevents common-mode signals from occupying the voltage range and causing saturation, thereby improving reliability.
Solution Approach 2:
The circuit applies preliminary anti-action by pre-subtracting the amplified common-mode signal from the differential-mode signal before the final output stage. This preemptive removal of common-mode components prevents them from causing saturation in subsequent amplification stages, ensuring reliable operation.
3Device complexity
If conventional amplifier circuit is used, then the implementation is straightforward, but DC offset in differential-mode signal causes amplifier saturation
Solution Approach 1:
The subtraction circuit implements a feedback mechanism where the output of the second amplifying unit (common-mode path) is subtracted from the output of the first amplifying unit (differential-mode path). This feedback structure automatically compensates for DC offsets by continuously removing the common-mode component, preventing saturation while maintaining straightforward implementation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively inhibits common-mode signals within a target frequency band, enhancing the CMRR and preventing amplifier saturation, thereby improving the amplification of differential-mode signals.
Implementation Method 1
positive common-mode capacitor and negative common-mode capacitor, configured to attenuate the input common-mode voltage below a first specific frequency
Data Source
AI summary
The present application discloses an amplifier circuit, a chip and an electronic device, which generates a positive output signal and a negative output signal according to a positive input signal and a negative input signal, wherein the positive input signal and the negative input signal have a corresponding input differential-mode voltage and input common-mode voltage, and the positive output signal and the negative output signal have a corresponding output differential-mode voltage and output common-mode voltage, and the amplifier circuit includes: an amplifying unit, configured to receive the positive input signal and the negative input signal and generate the positive output signal and the negative output signal; and an attenuation unit, including: a positive common-mode capacitor and a negative common-mode capacitor, configured to attenuate the input common-mode voltage below a first specific frequency.