Amplifier Load Circuit for Multi-Standard Common-Mode Voltage Support
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Solution Overview
Problem
High-speed interfaces with different standards require separate dedicated circuits for different common-mode voltage specifications, leading to increased circuit area and costs in signal processing devices.
Innovation Solution
A load circuit for amplifiers and a driver circuit for transmitters that utilize tristate control circuits and power sources capable of acting as both voltage and current sources, allowing the circuits to dynamically adjust voltage drops and signal levels to meet various interface standards, thereby supporting multiple interface standards with a shared circuit design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate dedicated circuits are used for different interface standards, then each interface standard can be supported reliably, but the circuit area and manufacturing costs increase
Solution Approach 1:
The load circuit is designed to support multiple interface standards (LVDS, subLVDS, MIPI D-PHY) through a single unified circuit architecture. The circuit can dynamically adjust its operation mode based on the detected interface standard, eliminating the need for separate dedicated circuits for each standard while maintaining reliable support for all standards.
Solution Approach 2:
The load circuit incorporates dynamic control mechanisms that adjust circuit parameters based on the operating mode. The control circuit receives mode selection signals and dynamically configures the load circuit's resistance values and transistor operations to match the requirements of different interface standards, enabling one circuit to adapt to multiple standards.
2Reliability
If separate dedicated circuits are used for different interface standards, then each interface standard can be supported reliably, but the manufacturing costs increase
Solution Approach 1:
By designing a universal load circuit that can operate with multiple interface standards through software or control signal configuration, the patent reduces the number of hardware components needed. This consolidation decreases manufacturing complexity, component count, and assembly costs while maintaining reliable support for all standards through dynamic adaptation.
3Area of stationary object
If a shared circuit design is used to support multiple interface standards, then circuit area and manufacturing costs are reduced, but the circuit must dynamically adjust to meet different common-mode voltage specifications
Solution Approach 1:
The load circuit employs dynamic control where transistors are switched between different operating states based on the detected interface standard. The control circuit adjusts transistor gate voltages and resistance values in real-time to match the common-mode voltage requirements of different standards, managing complexity through automated control rather than fixed hardware configurations.
Solution Approach 2:
The circuit changes its electrical parameters (resistance values, voltage levels, current distributions) based on the operating mode. By dynamically adjusting these parameters through control signals, the shared circuit can meet the different common-mode voltage specifications of various interface standards without requiring separate dedicated circuits for each standard.
4Ease of manufacture
If a shared circuit design is used to support multiple interface standards, then manufacturing costs are reduced, but the circuit must dynamically adjust to meet various interface standards
Solution Approach 1:
The load circuit is designed with universal functionality to support multiple interface standards through a single circuit architecture. The circuit incorporates detection and adaptation mechanisms that automatically configure it for the appropriate interface standard, providing versatile support while maintaining manufacturing efficiency through component consolidation.
Data Source
AI summary
A load circuit includes a first resistive element, a first transistor and a tristate control circuit. The first transistor has a first control terminal, a first connection terminal and a second connection terminal. The first connection terminal is coupled to to one of a first amplifier output terminal and a connection node through the first resistive element. The second connection terminal is coupled to the other of the first amplifier output terminal and the connection node. The tristate control circuit has a signal output terminal coupled to the first control terminal. When the signal output terminal is in the low impedance state, the first control terminal is arranged to receive a first control signal outputted from the signal output terminal. When the signal output terminal is in the high impedance state, the first control terminal is arranged to receive a second control signal different from the first control signal.