Analog Bi-Quad IIR Filter Using Delay Lines for Near-Zero Latency
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Solution Overview
Problem
Field-programmable gate arrays (FPGAs) and digital signal processors (DSPs) face significant latency and noise issues due to the conversion of analog signals to digital and back, which limits their effectiveness in processing analog signals efficiently.
Innovation Solution
An analog bi-quad infinite impulse response (IIR) filter is implemented, eliminating the need for analog-to-digital and digital-to-analog conversions by using configurable time-delay circuits, variable gain amplifiers, and power combiners to process analog signals directly, thereby reducing latency and noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If digital signal processing is used with ADC and DAC conversions, then processing capabilities are improved, but latency increases
Solution Approach 1:
The patent extracts and eliminates the ADC and DAC conversion stages from the signal processing chain. By using purely digital signal processing techniques, the system removes the analog-to-digital and digital-to-analog conversion steps that introduce latency, while maintaining full processing capabilities through digital methods.
Solution Approach 2:
The patent replaces the mechanical/electrical conversion process (ADC/DAC hardware conversions) with a purely digital processing approach. Instead of physically converting analog signals to digital and back, the system uses digital signal processing algorithms to achieve the same filtering and processing functions without the conversion overhead.
2Adaptability or versatility
If digital signal processing with ADC and DAC is used, then processing flexibility is improved, but noise increases
Solution Approach 1:
The patent removes the ADC and DAC conversion stages that are sources of quantization noise and distortion. By eliminating these conversion processes, the system maintains processing flexibility through digital methods while avoiding the noise and signal-to-noise ratio degradation introduced by analog-to-digital and digital-to-analog conversions.
3Loss of time
If analog signal processing is used, then latency is reduced, but processing capabilities are limited
Solution Approach 1:
The patent replaces traditional analog signal processing hardware with digital signal processing techniques. This substitution enables the system to achieve low-latency performance similar to analog processing while gaining the enhanced processing capabilities, flexibility, and programmability of digital systems through algorithms and software-based filtering.
Data Source
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AI summary
Examples provide a method and apparatus for an analog bi-quad infinite impulse response, IIR, filter. An amplifier (108) generates a positive output signal (110) corresponding to a received RF signal and a negative output signal (112) . A set of selectively switchable time-delay circuits (114) associated with a positive arm of the filter causes a predetermined delay (116) corresponding to a desired sample frequency. A first set of configurable variable gain amplifiers (126) amplify the positive output signal to establish a set of positive coefficients (128). A set of selectively switchable time-delay circuits (118) associated with a negative arm of the filter causes a predetermined delay. A delayed negative output signal is generated which is amplified by a second set of configurable variable gain amplifiers (132) to establish a set of negative coefficients (134). A set of power combiners (130) function as sum junctions to combine the delayed positive output signals and the delayed negative output signals into a single output signal (136).