Analog Bi-Quad IIR Filter Without ADC/DAC Latency
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Solution Overview
Problem
Field-programmable gate arrays (FPGAs) and digital signal processors (DSPs) face significant latency and noise issues due to the conversion of analog signals to digital and back, which is time-consuming and introduces inefficiencies in signal processing.
Innovation Solution
An analog bi-quad infinite impulse response (IIR) filter is implemented, eliminating the need for analog-to-digital and digital-to-analog conversions by using configurable time-delay circuits, variable gain amplifiers, and power combiners to process analog signals directly, reducing latency and noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If digital signal processing is used with ADC and DAC conversions, then signal processing capability is improved, but latency increases
Solution Approach 1:
The patent extracts and eliminates the ADC and DAC conversion stages from the signal processing chain. By implementing the filter entirely in analog domain, it removes the digital conversion overhead that causes latency, while preserving signal processing functionality through analog filtering operations.
Solution Approach 2:
The patent replaces the digital signal processing system (which requires ADC/DAC conversions) with an analog signal processing system. This substitution eliminates the mechanical conversion steps between analog and digital domains, reducing latency while maintaining filtering capability.
2Adaptability or versatility
If ADC and DAC conversions are performed, then digital processing is enabled, but noise increases
Solution Approach 1:
The patent removes the ADC and DAC conversion stages that are sources of noise. By keeping the signal entirely in the analog domain, it eliminates quantization noise and conversion artifacts that would otherwise be introduced during digital conversion processes.
Solution Approach 2:
The patent substitutes the noisy digital conversion process with a clean analog processing approach. This replacement eliminates the harmful noise factors inherent in ADC/DAC conversions while maintaining the essential filtering functionality.
3Loss of time
If analog signal processing is used, then latency is reduced, but filtering precision may be limited
Solution Approach 1:
The patent employs dynamic element selection through switchable capacitor arrays that allow real-time reconfiguration of filter coefficients. This dynamic capability enables precise filtering control in the analog domain, matching or exceeding digital precision while maintaining low latency.
Solution Approach 2:
The patent achieves precise filtering by dynamically changing circuit parameters (capacitor configurations, resistor values) to implement different filter coefficients. This parameter adjustment capability provides the precision needed for accurate analog filtering without requiring conversion to the digital domain.
Data Source
AI summary
Examples provide a method and apparatus for an analog bi-quad infinite impulse response (IIR) filter. An amplifier generates a positive output signal corresponding to a received RF signal and a negative output signal. A set of selectively switchable time-delay circuits associated with a positive arm of the filter causes a predetermined delay corresponding to a desired sample frequency. A first set of configurable variable gain amplifiers amplify the positive output signal to establish a set of positive coefficients. A set of selectively switchable time-delay circuits associated with a negative arm of the filter causes a predetermined delay. A delayed negative output signal is generated which is amplified by a second set of configurable variable gain amplifiers to establish a set of negative coefficients. A set of power combiners function as sum junctions to combine the delayed positive output signals and the delayed negative output signals into a single output signal.