Analog Bitscan for Memory Programming Precision
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Solution Overview
Problem
Current non-volatile memory devices face challenges in optimizing programming and erasing operations due to limited output options from traditional bitscan operations, which restricts the ability to dynamically adjust parameters for improved performance, reliability, and endurance.
Innovation Solution
The implementation of an analog bitscan operation that generates additional output options (strong pass, weak pass, weak fail, and strong fail) allows for more precise control of programming and erasing processes by counting memory cells and determining outputs based on busy time calculations and tier scanning, enabling adjustments to programming or erasing parameters.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If traditional bitscan operations are used with limited output options, then the device complexity is reduced, but the ability to dynamically adjust programming and erasing parameters is restricted
Solution Approach 1:
The bitscan operation is transformed from a static binary output system to a dynamic multi-level output system. The circuit now generates four distinct output levels (strong pass, weak pass, weak fail, strong fail) based on the count of memory cells that pass verification, enabling dynamic parameter adjustment throughout the programming and erasing processes.
Solution Approach 2:
The output of the bitscan operation is changed from a simple pass/fail binary state to a multi-level indicator system. By comparing the count of passed memory cells against multiple thresholds, the system generates differentiated output signals that reflect the degree of completion, allowing for nuanced parameter adjustments in subsequent programming or erasing loops.
2Reliability
If analog bitscan operation with multiple output options is implemented, then programming and erasing optimization is improved, but the device complexity increases
Solution Approach 1:
The bitscan operation provides feedback about the state of memory cell programming or erasing completion. By counting how many cells pass verification and comparing against thresholds, the system generates feedback signals (strong pass, weak pass, weak fail, strong fail) that inform subsequent parameter adjustments, creating a closed-loop control system that improves reliability and data retention.
Solution Approach 2:
The verification outcome is segmented into four distinct categories rather than a single binary result. By dividing the pass/fail continuum into strong pass, weak pass, weak fail, and strong fail segments based on threshold comparisons, the system provides more granular information about memory cell state without requiring fundamentally new circuit architecture.
3Manufacturing precision
If traditional binary bitscan output is used, then the operation speed is maintained, but the manufacturing precision of programming and erasing is limited
Solution Approach 1:
The system performs a complete count of all memory cells that pass verification, which is more thorough than traditional binary bitscan. By counting every passed cell and comparing against multiple thresholds, the system extracts maximum precision from the existing operational framework without requiring additional time beyond the verification process itself.
Data Source
AI summary
The memory device includes a memory block with a plurality of memory cells that are arranged in a plurality of word lines. Circuitry is configured to program at least some of the plurality of memory cells in a program loop or that is configured to erase at least some of the plurality of memory cells in an erase loop. During the program loop or the erase loop, the circuitry is configured to perform a verify operation and an analog bitscan operation. In the analog bitscan operation, the circuitry counts the memory cells that pass or that fail the verify operation. The circuitry is also configured to determine an output of the analog bitscan operation, the output being one of at least three options.


