Analog Demultiplexer Clocking for Wider-Band ADC Sampling

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Solution Overview

Problem

Current analog-to-digital converters, particularly those using time-interleaving and mixer-based systems, face challenges in expanding the analog input band due to parasitic capacitance effects and the need for large, steep high-pass filters, which complicates signal balancing and compensation.

Innovation Solution

An analog demultiplexer circuit with complementary clock signals and track-and-hold circuits that double the analog input band by folding processing signals, eliminating the need for large filters and simplifying signal compensation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If time-interleaved ADC architecture is used to increase sampling rate, then sampling rate is improved, but analog input band is limited due to parasitic capacitance forming low-pass filter

Engineering Contradiction:
Improvesampling rateVSAvoidanalog input band
Core Design Contradiction:
SpeedVSAdaptability or versatility

Solution Approach 1:

The patent divides the wideband analog input signal into multiple frequency bands using bandpass filters, assigns each band to a separate ADC for conversion, then combines the results. This segmentation allows each ADC to operate within its optimal bandwidth while collectively handling a wider input band, resolving the contradiction between high sampling rate and wide analog input band.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If mixer-based system is used to realize wide-band ADC, then analog input band is expanded, but large steep high-pass filter is required complicating signal balancing

Engineering Contradiction:
Improveanalog input bandVSAvoidfilter and compensation complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

Instead of using a single large steep high-pass filter, the patent segments the frequency processing into multiple gentler bandpass filters covering different frequency ranges. This segmentation replaces the need for one complex steep filter with multiple simpler filters, reducing overall device complexity while maintaining wideband capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent inverts the conventional approach by using bandpass filters to divide the spectrum rather than using a high-pass filter to extract high-frequency components. This inversion simplifies the filtering requirements and reduces the complexity of signal balancing and compensation circuits.

Inventive Principle:
Principle #13The other way round (Inversion)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution effectively doubles the conventional analog input band without requiring large filters, ensuring balanced signal processing and simplified demodulation, thereby improving the sampling rate and signal integrity.

Implementation Method 1

a first track-and-hold circuit configured to hold analog input signals in synchronization with the first clock signals; and a second track-and-hold circuit configured to hold the analog input signals in synchronization with the second clock signals

Methodology Applied
Scientific EffectTracking and holding:

Data Source

PatentUS11888495B2Analog multiplexer circuit and analog-digital conversion system
Publication Date: 2024.01.30 NIPPON TELEGRAPH & TELEPHONE CORP
  • US11888495B2 patent drawing
  • US11888495B2 patent drawing
  • US11888495B2 patent drawing

AI summary

An analog demultiplexer circuit includes a clock distribution circuit that outputs clock signals (CK1P and CK1N) and clock signals (CK2P and CK2N) complementary thereto, a track-and-hold circuit that holds analog input signals (VINP and VINN) in synchronization with the clock signals (CK1P and CK1N), and a track-and-hold circuit that holds the analog input signals (VINP and VINN) in synchronization with the clock signals (CK2P and CK2N).