Analog Flash PUF Crossbar for Reconfigurable Hardware Security
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Solution Overview
Problem
Conventional cryptographic approaches for hardware security are vulnerable to physical and side-channel attacks, and existing physically unclonable functions (PUFs) rely on linear mapping functions, making them susceptible to machine learning attacks and requiring extensive error correction due to high bit error rates.
Innovation Solution
The development of hardware-intrinsic security primitives based on analog flash memory devices with floating-gate transistors, utilizing instance-specific process-induced variations for generating unpredictable cryptographic data without the need for key storage, employing a crossbar configuration and peripheral circuitry to create reconfigurable physically unclonable functions (PUFs) that provide nonlinear responses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional cryptographic approaches use secret keys stored in nonvolatile memories, then key generation and storage is achieved, but the system becomes vulnerable to physical and side-channel attacks
Solution Approach 1:
The patent extracts the secret key storage requirement entirely from the system. Instead of storing keys in nonvolatile memories, the invention uses PUFs to generate cryptographic keys on-demand from physical process variations. This eliminates the vulnerable key storage component while maintaining cryptographic functionality through challenge-response authentication mechanisms.
Solution Approach 2:
The PUF-based system is self-service in that it generates its own cryptographic keys internally from its unique physical characteristics without requiring external key distribution or storage. The device uses its own process-induced variations as the entropy source, making the key generation self-contained and immune to external key management vulnerabilities.
2Reliability
If existing PUFs use linear mapping functions, then simple key generation is achieved, but the system becomes susceptible to machine learning attacks and requires extensive error correction
Solution Approach 1:
The patent changes the fundamental parameter of the mapping function from linear to nonlinear. By using nonlinear functions to process the challenge inputs and generate response outputs, the system increases complexity for machine learning attacks while maintaining efficient operation. This parameter change inherently reduces bit error rates, eliminating the need for extensive error correction mechanisms.
Solution Approach 2:
The patent converts the previously harmful effect of high bit error rates into a benefit by using nonlinear mapping functions. The nonlinear processing not only provides resistance to machine learning attacks but also naturally produces lower error rates, turning what was a disadvantage into an advantage that eliminates the need for complex error correction.
3Reliability
If PUFs rely on process-induced variations for entropy, then unique cryptographic fingerprints are generated, but the system requires extensive error correction due to high bit error rates
Solution Approach 1:
The patent changes the operational parameters by applying nonlinear mapping functions to the PUF output. This transformation processes the raw process-induced variations through nonlinear operations that reduce sensitivity to small variations, thereby lowering the bit error rate without requiring additional error correction hardware or protocols.
Data Source
AI summary
A security primitive for an integrated circuit comprises an array of floating-gate transistors monolithically integrated into the integrated circuit and coupled to one another in a crossbar configuration. The floating-gate transistors have instance-specific process-induced variations in analog behavior to provide one or more reconfigurable physically unclonable functions (PUFs).