Analog Circuit Logic Locking With Selectable Resistance Matching
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Solution Overview
Problem
Circuit designs are vulnerable to overproduction, reverse engineering, and replication during fabrication, posing a challenge for design-only firms that rely on licensing their designs to fabricators and end users.
Innovation Solution
The implementation of digital logic locking techniques for analog circuits, which utilize a controller and off-chip memory to manage a logic lock key that interacts with transistors to set the circuit to either an unlocked or locked state by matching or mismatching resistances within a specific tolerance, thereby controlling access and functionality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If digital logic locking is implemented in analog circuits, then circuit security and access control are improved, but device complexity increases due to additional controller and memory components
Solution Approach 1:
The circuit is divided into functional segments: the analog circuit portion and the digital control portion (controller + memory). The digital logic locking mechanism is segmented into separate components that can be independently designed and integrated, allowing the security function to be added without completely redesigning the entire analog circuit.
Solution Approach 2:
A controller acts as an intermediary between the digital logic lock key and the analog circuit. The controller receives the logic lock key, processes it through firmware, and generates control signals that adjust the transistor resistances. This intermediary layer isolates the complex digital logic from the analog circuit, managing the complexity interface.
2Adaptability or versatility
If multiple selectable resistances are implemented using transistor combinations, then access control capability is improved, but manufacturing precision requirements increase to maintain designed resistance ratios and tolerances
Solution Approach 1:
The system changes the resistance parameter of transistor combinations dynamically based on the logic lock key. By selecting different transistor combinations (changing which transistors are ON or OFF), the effective resistance values are adjusted to achieve the required ratio match. This parameter change approach allows post-manufacturing configuration to compensate for manufacturing variations.
Solution Approach 2:
The firmware is pre-configured with the specific combination of transistors that will achieve the correct resistance ratio for each circuit instance. During manufacturing or initialization, the system determines the optimal transistor combination and stores this configuration in the controller's firmware, preparing the circuit in advance for its specific hardware characteristics.
3Reliability
If off-chip memory is used to store the logic lock key, then security against copying is improved, but loss of information increases if the key is not properly retained
Solution Approach 1:
The logic lock key is extracted from the analog circuit and stored in separate off-chip memory. This physical separation ensures that the key information is not duplicated within the analog circuit itself, preventing copying through reverse engineering of the analog components. The key exists only in the external memory device.
Solution Approach 2:
The patent replaces physical or hardware-based key storage with digital storage in off-chip memory. Instead of using mechanical switches or physical configurations to represent the key, the system uses digital bits stored in memory, which can be securely managed and are harder to replicate without detection.
Data Source
AI summary
An analog circuit has a first plurality of transistors that are connected as a first selectable resistance in the analog circuit, and a second plurality of transistors that are connected as a second selectable resistance in the analog circuit. In an unlocked state of the analog circuit, the first selectable resistance matches the second selectable resistance within a designed ratio and tolerance. In a locked state of the analog circuit, the first selectable resistance and the second selectable resistance do not match within the designed ratio and tolerance. A controller retrieves a logic lock key from an off-chip memory and selects the first and second selectable resistances, thereby setting the analog circuit to its unlocked state, by sending respective first and second portions of the logic lock key to operate the first and second pluralities of transistors.