Analog Neural Memory Output Array Calibration for Leakage and Offset
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Solution Overview
Problem
Existing artificial neural networks face challenges in achieving high-performance information processing due to a lack of adequate hardware technology, particularly in efficiently utilizing non-volatile memory cells for vector by matrix multiplication (VMM) systems, and compensating for leakage and offset in input and output blocks.
Innovation Solution
The development of configurable input and output blocks for analog neural memory systems using non-volatile memory cells, with methods to measure and compensate for leakage and offset, including techniques for determining the least significant bit (LSB) and performing temperature adjustments to enhance accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If non-volatile memory cells are used for VMM operations, then energy efficiency is improved, but leakage and offset errors worsen computation accuracy
Solution Approach 1:
The patent applies preliminary action by performing calibration operations before actual VMM computations. The system pre-determines offset values and leakage characteristics of memory cells during a calibration phase, storing these values for subsequent use. This allows the system to compensate for accuracy issues during computation without sacrificing energy efficiency, as the calibration is done once rather than continuously during operation.
Solution Approach 2:
The patent implements feedback mechanisms where the system measures actual output values from memory cells, compares them against expected values, and uses the difference (offset) to adjust subsequent operations. The calibration process establishes feedback loops that allow the system to correct for leakage and offset errors by adjusting weight values or input signals based on measured performance characteristics.
2Measurement precision
If high precision weight values are stored in memory cells, then computation accuracy is improved, but device complexity increases
Solution Approach 1:
The patent applies partial action by implementing calibration only for the specific precision level required by the application. Rather than attempting to achieve maximum theoretical precision for all memory cells, the system determines the necessary precision level and calibrates accordingly. This may involve calibrating only a subset of memory cells or using reduced-precision calibration data, thereby avoiding the full complexity overhead while maintaining sufficient accuracy.
3Measurement precision
If calibration operations are performed to compensate for leakage and offset, then computation accuracy is improved, but processing time increases
Solution Approach 1:
The patent minimizes time loss by performing calibration operations during idle periods or before the system is put into production use. The calibration data is stored and reused for multiple computation operations, so the time investment is amortized over many subsequent high-accuracy computations. This approach ensures that calibration does not significantly impact the time cost of actual neural network inference or training operations.
Data Source
AI summary
Configurable input blocks and output blocks and physical layouts are disclosed for analog neural memory systems that utilize non-volatile memory cells. An input block can be configured to support different numbers of arrays arranged in a horizontal direction, and an output block can be configured to support different numbers of arrays arranged in a vertical direction. Adjustable components are disclosed for use in the configurable input blocks and output blocks. Systems and methods are utilized for compensating for leakage and offset in the input blocks and output blocks the in analog neural memory systems.