Analog Memory Programming With Feedback Pulse Adjustment

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Solution Overview

Problem

Traditional digital circuitry for neural network computations is computationally expensive, energy-intensive, and latency-prone, especially when deployed in edge devices, requiring significant memory and compute resources, and existing AI systems face latency issues due to remote computing dependencies.

Innovation Solution

Analog memory arrays with programmable non-volatile memory cells are initialized and programmed using adaptive feedback mechanisms, including ADC offset compensation and iterative pulse adjustments, to efficiently implement AI models in edge devices with reduced latency and energy consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If traditional digital circuitry is used for neural network computations, then computing accuracy is maintained, but energy consumption and circuit area increase significantly

Engineering Contradiction:
Improveenergy consumptionVSAvoidcomputing accuracy
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent replaces traditional digital computing systems with analog neuromorphic systems that use continuous voltage signals to represent neural network weights and perform computations through physical analog operations, thereby reducing energy consumption while maintaining computational functionality

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The system transitions from discrete digital parameters to continuous analog parameters, using voltage levels to represent weight values and enabling more efficient computation through analog mathematical operations that consume less power than digital equivalents

Inventive Principle:
Principle #35Parameter changes

2Reliability

If more digital memory circuitry is added to store neural network weights, then computing accuracy is improved, but circuit area and energy consumption increase

Engineering Contradiction:
Improvecomputing accuracyVSAvoidcircuit area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent replaces digital memory storage with analog memory elements that use continuous voltage states to store neural network weights, dramatically reducing the physical area required while maintaining the ability to store and retrieve weight information for accurate computations

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The analog memory elements serve dual functions as both storage and computation components, eliminating the need for separate digital memory circuitry and reducing overall circuit area while maintaining computing accuracy through analog weight representation

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Power

If remote computing systems are used for AI processing, then computing power is sufficient, but latency increases due to network transmission

Engineering Contradiction:
Improvecomputing powerVSAvoidlatency
Core Design Contradiction:
PowerVSLoss of time

Solution Approach 1:

The patent replaces remote cloud-based computing with local edge computing using neuromorphic circuits, enabling AI processing to occur directly at the point of data generation and consumption, thereby eliminating network transmission delays while maintaining adequate computing power for inference tasks

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS12531129B1Systems and methods for implementing a feedback-informed memory programming of an integrated circuit
Publication Date: 2026.01.20 MYTHIC INC
  • US12531129B1 patent drawing
  • US12531129B1 patent drawing
  • US12531129B1 patent drawing

AI summary

A method is disclosed for programming analog-valued weights in a non-volatile memory array using feedback-based estimation and adaptive pulse modulation. The method includes initializing a target weight, applying one or more programming pulses to a memory cell, estimating a weight state of the memory cell based on analog-to-digital conversion, determining a residual error between the estimated weight state and the target weight, and computing a subsequent programming pulse based on the residual error. The subsequent pulse may be adjusted by selecting a programming voltage from a quantized set of levels responsive to the recent weight response dynamics. The programming process may iterate until convergence may be achieved within a defined threshold. The technique supports precise control of conductance programming using closed-loop feedback and may be compatible with pulse-width, amplitude, and polarity modulation schemes.