Analog Row Access Tracking for Memory Refresh
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Solution Overview
Problem
As memory components shrink, the increased density of memory cells leads to data degradation issues due to repeated access, known as 'row hammer,' where nearby cells experience accelerated decay, making it difficult to effectively refresh memory cells without digital counters, which are limited by space and power constraints.
Innovation Solution
Analog row access tracking using a refresh control circuit with unit cells that track wordline accesses, updating voltages, and flagging wordlines for targeted refresh operations, along with a targeted refresh queue that prioritizes addresses based on access frequency to mitigate data decay.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If digital counters are used to track row accesses, then row hammer effects can be detected, but space and power constraints are violated
Solution Approach 1:
The patent replaces digital counters (mechanical/electronic counting system) with an analog voltage-based tracking system. Each unit cell uses a capacitor to store voltage representing access count, eliminating the need for complex digital logic circuits. This substitution dramatically reduces space consumption while maintaining row hammer detection capability through voltage threshold comparison.
Solution Approach 2:
The patent changes the tracking parameter from discrete digital count values to continuous voltage levels. By mapping access frequency to voltage magnitude on capacitors, the system achieves compact representation of access counts. The voltage can be incremented continuously through charge pumping circuits, providing a space-efficient method to track row accesses without requiring multiple bits per counter.
2Reliability
If digital counters are used to track row accesses, then row hammer effects can be detected, but power consumption increases
Solution Approach 1:
The replacement of active digital counters with passive analog voltage storage on capacitors significantly reduces power consumption. The capacitors hold voltage states without requiring continuous power, unlike digital counters that need clock signals and logic gate operations. Only during voltage updates (row access) is power consumed, making the system much more energy-efficient for continuous monitoring.
Solution Approach 2:
The system uses periodic charge pumping to update voltages only when row accesses occur, rather than continuously clocking digital counters. The voltage incrementing is triggered by detected row activations, creating an event-driven update mechanism that consumes power only when necessary, significantly reducing average power consumption compared to continuously operating digital counters.
3Reliability
If all memory cells are refreshed periodically, then data loss is prevented, but refresh efficiency decreases due to row hammer effects
Solution Approach 1:
The patent implements targeted refresh by identifying specific victim rows affected by row hammer through voltage threshold detection in unit cells. Instead of uniformly refreshing all rows, the system applies refresh operations only to rows where the analog voltage indicators exceed thresholds, indicating excessive access by neighboring aggressor rows. This localized approach maintains data integrity for affected cells while improving overall refresh efficiency by avoiding unnecessary refreshes of unaffected rows.
Solution Approach 2:
The system uses feedback from the analog voltage indicators to dynamically determine refresh needs. When voltage on a unit cell's capacitor exceeds a threshold, it triggers a refresh operation on the corresponding victim row. This feedback mechanism allows the system to adapt refresh operations to actual row hammer conditions, preventing data loss in affected areas while optimizing refresh resource allocation away from unaffected areas.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for efficient identification and prioritization of memory cells needing refresh, reducing data loss by targeting affected cells and optimizing refresh operations within power and space constraints.
Implementation Method 1
Each unit cell may include a capacitor that stores a voltage representing the access count
Data Source
AI summary
Embodiments of the disclosure are drawn to apparatuses and methods for analog row access tracking. A plurality of unit cells are provided, each of which contains one or more analog circuits used to track accesses to a portion of the wordlines of a memory device. When a wordline in the portion is accessed, the unit cell may update an accumulator voltage, for example by adding charge to a capacitor. A comparator circuit may determine when one or more accumulator voltages cross a threshold (e.g., a reference voltage). Responsive to the accumulator voltage crossing the threshold, an aggressor address may be loaded in a targeted refresh queue, or if the aggressor address is already in the queue, a priority flag associated with that address may be set. Aggressor addresses may be provided to have their victims refreshed in an order based on the number of set priority flags.