Analog Sampling Circuit With Dual Feedback for KTC Noise Attenuation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Analog sampling circuits face significant noise issues, particularly KTC noise, which affect the accuracy of sampled signals due to the inherent characteristics of sampling switches and capacitors, leading to a need for low noise sampling methods.

Innovation Solution

A low noise analog sampling circuit utilizing a transistor connected to first and second feedback loops, where the first loop introduces a noise that is subsequently attenuated by multiple capacitors in the second loop, resulting in a significantly reduced noise level, allowing for accurate signal output.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a sampling switch is connected to a capacitor for analog sampling, then the sampling function is achieved, but KTC noise is introduced that affects sampling accuracy

Engineering Contradiction:
Improvesampling accuracyVSAvoidKTC noise
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent employs a two-loop feedback architecture: a first feedback loop during the sampling phase to maintain transistor state, and a second feedback loop during the hold phase to compensate for noise. The second loop uses an error amplifier to detect and correct the KTC noise introduced when the first loop is opened, thereby improving sampling accuracy while managing the inherent noise generation.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The circuit operates in periodic phases, alternating between a sampling phase (first operational phase) where the first feedback loop is closed and a hold phase (second operational phase) where the second feedback loop becomes active. This periodic switching allows the system to achieve both accurate sampling and noise reduction at different times in the operation cycle.

Inventive Principle:
Principle #19Periodic action

2Productivity

If the first feedback loop is opened to complete the sampling operation, then the sampling process is finalized, but a significant noise is introduced on the capacitor

Engineering Contradiction:
Improvesampling operation completionVSAvoidfirst noise
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The patent prepares the second feedback loop in advance during the sampling phase, keeping it ready to immediately compensate for noise once the first loop is opened. The error amplifier and associated capacitors are pre-configured so that when the first feedback loop opens and introduces noise, the second loop can quickly detect and correct the disturbance, minimizing the impact of the noise introduction.

Inventive Principle:
Principle #10Preliminary action

3Object-generated harmful factors

If a second feedback loop is used to compensate for noise, then noise attenuation is achieved, but the circuit complexity increases

Engineering Contradiction:
Improvenoise levelVSAvoidfeedback loop structure
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The patent combines the noise compensation function with the existing feedback architecture by integrating the second feedback loop to work in conjunction with the first loop. Rather than adding a completely separate noise cancellation system, the invention merges the compensation mechanism into the feedback structure, using shared components like the error amplifier and capacitors that serve both sampling and noise reduction functions.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS7612586B1Low noise analog sampling circuit and a method for low noise sampling of an analog signal
Publication Date: 2009.11.03 PIXIM ISRAEL
  • US7612586B1 patent drawing
  • US7612586B1 patent drawing
  • US7612586B1 patent drawing

AI summary

A low noise analog sampling circuit that includes a transistor connected to a first feedback loop and to a second feedback loop. During a second operational phase the second feedback loop provides the transistor a feedback signal that is responsive to an amplified error signal; wherein the error signal represents a difference between (i) a sampled signal representative of a state of the transistor short period before a first feedback loop was opened and (ii) a signal representative of a current state of the transistor; wherein at an end of the second operational phase the second feedback loop is opened and introduces a second noise that is attenuated by multiple capacitors.