Analog Circuit Simulator Event-Driven Verification

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Solution Overview

Problem

Conventional analog circuit simulators require extensive memory and time for verification, especially for large-scale circuits, and struggle to accurately represent circuits with impedance using hardware description language, leading to inefficient verification processes.

Innovation Solution

An analog circuit simulator that searches for analog nodes, collects and converts voltage and current variable information into time functions, and performs simulation only at specific events, reducing computational load and enabling fast functional verification.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional analog circuit simulators are used for verification, then calculation accuracy is improved, but verification time and memory usage increase tremendously

Engineering Contradiction:
Improvecalculation accuracyVSAvoidverification time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent segments the analog circuit into multiple blocks, where each block is modeled independently with defined input and output ports. This allows the complex circuit to be divided into manageable sections that can be simulated more efficiently while maintaining overall accuracy.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces operation models as intermediary representations between the detailed analog circuit and the verification process. These operation models describe circuit behavior at a higher level of abstraction, reducing the computational burden while preserving essential functional characteristics.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If hardware description language is used to model analog circuits, then verification speed is improved, but ability to express impedance and circuit interactions is worsened

Engineering Contradiction:
Improveverification speedVSAvoidability to express impedance
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent applies different modeling approaches to different parts of the circuit. Analog blocks that require impedance representation are modeled with specific electrical characteristics, while digital portions use standard hardware description language constructs. This allows each section to be modeled with the appropriate level of detail and physical accuracy.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the parameters and variables used to describe circuit behavior. Instead of using only digital logic levels, the model incorporates voltage, current, and impedance parameters for analog portions, allowing the same hardware description language framework to express both digital and analog circuit characteristics.

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If detailed simulation of all circuit nodes is performed, then measurement precision is improved, but computational complexity and time consumption increase

Engineering Contradiction:
Improvesimulation accuracyVSAvoidcomputational complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent extracts only the essential variables needed for verification from the full circuit model. By identifying and removing unnecessary detailed information while retaining critical electrical characteristics, the model achieves sufficient accuracy for verification purposes with reduced computational complexity.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS9009636B2Analog circuit simulator and analog circuit verification method
Publication Date: 2015.04.14 FUJITSU LTD
  • US9009636B2 patent drawing
  • US9009636B2 patent drawing
  • US9009636B2 patent drawing

AI summary

An analog circuit simulator includes a processor that is configured to search design data for analog circuits and an analog node connecting the analog circuits; collect variable information that concerns voltage and current variables and is related to input to and output from the analog node; convert the variable information into time functions; and compute the time functions upon each occurrence of a given event and execute simulation of the analog node.