Analogue Test Circuit for Continuous Fault Detection

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Solution Overview

Problem

Existing fault detection methods in analogue circuits are time-consuming and burdensome, particularly in industrial applications where systems remain in an on-state for extended periods, posing challenges in providing self-testing without undue burden.

Innovation Solution

A test circuit that includes a detector block to monitor analogue signals from a further circuit, determining fault occurrence based on changes in the signal over a defined time duration, using a characterisation block to filter noise and generate a signature signal, and generating a fault signal based on predetermined criteria.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If ABIST testing is performed in analogue circuits to detect latent faults, then fault detection capability is improved, but testing time and circuit complexity increase significantly

Engineering Contradiction:
Improvefault detection capabilityVSAvoidcircuitry size
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the fault detection functionality from a separate testing phase and integrates it into the normal operational phase. The monitoring circuit continuously observes analogue signals during regular circuit operation, separating the detection function from the test execution function, thereby eliminating the need for dedicated ABIST circuitry while maintaining fault detection capability

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The monitoring circuit serves multiple functions: it continuously monitors analogue signals during normal operation, detects latent faults, and provides safety verification all within the same operational framework. This multi-functionality eliminates the need for separate ABIST circuitry, reducing overall circuit complexity while maintaining comprehensive fault detection

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If ABIST testing is performed frequently to ensure safety, then fault detection reliability is improved, but system productivity and operational time are reduced

Engineering Contradiction:
Improvesafety mechanism effectivenessVSAvoidsystem operational time
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The monitoring circuit performs continuous fault detection during normal circuit operation rather than interrupting operation for periodic ABIST testing. The useful action of fault detection occurs continuously in the background, allowing the system to maintain both high safety effectiveness and maximum operational time without testing interruptions

Inventive Principle:
Principle #20Continuity of useful action

3Measurement precision

If comprehensive ABIST testing is implemented to detect all latent faults, then measurement precision of fault detection is improved, but loss of time and operational efficiency decrease

Engineering Contradiction:
Improvefault detection accuracyVSAvoidtesting time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The monitoring circuit is pre-configured with safety criteria and fault detection thresholds before operation begins. During normal operation, it continuously evaluates analogue signals against these pre-established criteria, enabling immediate fault detection without the need for time-consuming comprehensive ABIST testing sequences

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP4641225A1Test circuit for detecting faults occurring in a further circuit
Publication Date: 2025.10.29 NXP BV
  • EP4641225A1 patent drawingFigure 1~2
  • EP4641225A1 patent drawingFigure 3
  • EP4641225A1 patent drawing

AI summary

A test circuit for detecting faults occurring in a further circuit, the test circuit comprising: a detector block configured to: receive an input signal at least based on an analogue signal output from the further circuit during operation of the further circuit; determine the occurrence of changes in the input signal, and generate a fault signal indicative of a determination of the occurrence of a fault in the further circuit based at least on a predetermined number of the determined changes in the input signal occurring over a first time duration.