Anisotropic Etch Stop Layer Deposition for Semiconductor Fin Protection
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As semiconductor devices continue to shrink in feature size, challenges arise in integrating more components into a given area while maintaining device performance and reliability, particularly in forming high-quality etch stop layers and protecting underlying structures during processing steps.
Innovation Solution
An anisotropic deposition process is employed to form an etch stop layer with varying thicknesses, using a combination of pulsing a non-plasma precursor and a plasma precursor biased towards the semiconductor fin, resulting in a silicon nitride etch stop layer with enhanced properties and improved protection during subsequent processing steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional deposition processes are used to form etch stop layers, then the manufacturing process is simple, but the etch stop layer has insufficient thickness control and poor protection capability
Solution Approach 1:
The deposition process is segmented into multiple sequential steps: forming a first etch stop layer with initial thickness, performing a first planarization to flatten the surface, and then forming a second etch stop layer with additional thickness. This segmentation allows precise thickness control at each stage while maintaining overall process manageability.
Solution Approach 2:
The first etch stop layer is formed and planarized before the second etch stop layer is deposited. This preliminary action ensures that the underlying structure is protected and the surface is properly prepared, enabling subsequent layers to be formed with precise thickness control without compromising the integrity of lower layers.
2Productivity
If feature sizes are reduced to increase integration density, then more components can be integrated into a given area, but device performance and reliability deteriorate
Solution Approach 1:
Different regions of the semiconductor device receive different levels of protection through the multi-layer etch stop structure. The first and second etch stop layers provide varying thicknesses and protection levels to different areas, allowing critical regions to be better protected while maintaining high integration density overall.
Solution Approach 2:
The etch stop layers are formed in advance to provide protective cushioning to underlying structures before subsequent processing steps. This prior protection prevents damage to critical features during manufacturing, maintaining device reliability even as feature sizes are reduced to increase integration density.
3Strength
If a single thick etch stop layer is formed, then protection is provided, but process control and defect reduction are compromised
Solution Approach 1:
The single thick etch stop layer is segmented into two separate layers: a first etch stop layer and a second etch stop layer. Each layer can be independently controlled and optimized, improving process control and defect management while collectively providing the necessary protection capability.
Solution Approach 2:
The formation of etch stop layers is performed in periodic cycles: deposit the first layer, planarize, then deposit the second layer. This periodic action allows for intermediate quality checks and process adjustments, enhancing manufacturing precision while maintaining cumulative protection strength.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The process allows for a larger process window, reduces defects, and enhances device performance by providing better protection to underlying structures and improving integration density without compromising device integrity.
Implementation Method 1
depositing the etch stop layer including: pulsing a first precursor over the gate stack, the first precursor being a non-plasma; and after the pulsing the first precursor, pulsing a second precursor over the gate stack, the second precursor being a plasma that is biased towards the semiconductor fin
Data Source
AI summary
An etch stop layer is formed over a semiconductor fin and gate stack. The etch stop layer is formed utilizing a series of pulses of precursor materials. A first pulse introduces a first precursor material to the semiconductor fin and gate stack. A second pulse introduces a second precursor material, which is turned into a plasma and then directed towards the semiconductor fin and gate stack in an anisotropic deposition process. As such, a thickness of the etch stop layer along a bottom surface is larger than a thickness of the etch stop layer along sidewalls.