Deep Learning Pipeline Architecture for ANN Calculation Speed
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Solution Overview
Problem
Artificial neural networks (ANNs) face challenges in reducing calculation time and memory requirements, particularly in deep learning processes, due to inefficiencies in existing processor-based systems and the need for optimized architectures that enhance calculation speed and reduce memory usage.
Innovation Solution
A deep learning apparatus with a pipeline architecture that includes an input memory, data processing modules with combinational logic circuits for weight correction, bias correction, and a controller for managing data flow, allowing simultaneous processing of output values, corrected input data, and weight corrections without the need for transposed weight matrices or excessive memory storage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional processor-based systems are used for deep learning, then general-purpose computing capability is maintained, but calculation time increases and memory requirements increase
Solution Approach 1:
The data processing module is divided into multiple stages (first stage for output value calculation, second stage for corrected input data calculation, third stage for corrected output value calculation, fourth stage for weight correction, fifth stage for input bias correction, sixth stage for output bias correction). Each stage processes specific computations independently and simultaneously, enabling parallel execution that dramatically reduces calculation time while maintaining accuracy.
Solution Approach 2:
The patent transitions from sequential processing in conventional processors to a multi-dimensional pipeline architecture where multiple processing stages operate simultaneously. The pipeline structure adds a temporal dimension to processing, allowing different stages to work on different data batches at the same time, thereby improving throughput and reducing overall calculation time.
2Productivity
If conventional processor-based systems are used for deep learning, then flexibility in algorithm implementation is maintained, but memory capacity requirements increase
Solution Approach 1:
Weight correction values, input bias correction values, and output bias correction values are calculated and stored in advance during the processing of input batches. The correction values are pre-computed in earlier stages and made available for subsequent weight and bias updates, eliminating the need to store large amounts of intermediate data and reducing memory requirements.
Solution Approach 2:
Intermediate calculation results from each processing stage are discarded after being used by the next stage, rather than being stored in memory. The pipeline architecture ensures that each stage receives only the necessary input data and discards its output once the next stage has consumed it, minimizing memory usage while maintaining computational efficiency.
3Productivity
If pipeline architecture is implemented, then calculation time is reduced and memory requirements are reduced, but device complexity increases
Solution Approach 1:
Each processing stage in the pipeline is designed to perform multiple functions: calculating correction values, updating weights and biases, and preparing data for the next stage. This multi-functionality reduces the need for separate dedicated components for each operation, simplifying the overall device architecture while maintaining the benefits of parallel processing.
Data Source
AI summary
A deep learning apparatus for an artificial neural network (ANN) having pipeline architecture. The deep learning apparatus for an ANN simultaneously performs output value processing, corrected input data processing, corrected output value processing, weight correction, input bias correction, and output bias correction using pipeline architecture, thereby reducing calculation time for learning and reducing required memory capacity.