Anti-Serial ESD Protection Layout for Low RF Harmonic Distortion
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Solution Overview
Problem
Traditional ESD protection devices, such as TVS devices, generate spurious signals and intermodulation distortion due to non-linear electrical characteristics, which is a concern in RF applications where electromagnetic compatibility is crucial, and there is a need for a semiconductor-based solution with improved linearity and reduced harmonics generation at a low cost.
Innovation Solution
An overvoltage protection device is designed with first and second semiconductor devices in an anti-serial configuration, featuring a conductive link between them, with additional capacitance in one transmission path to match the self-capacitance of the link, ensuring symmetrical capacitance and minimizing even harmonic distortion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If TVS devices are used for ESD protection, then cost is reduced and overshoot is minimized, but harmonic distortion and spurious signal emission increase due to non-linear electrical characteristics
Solution Approach 1:
The TVS device is segmented into two separate semiconductor devices (first and second devices) with different breakdown voltages, arranged in an anti-serial configuration. This segmentation allows each device to handle different polarity voltage spikes independently, reducing the non-linear effects and harmonic distortion that would occur in a single-device TVS structure.
Solution Approach 2:
The patent employs asymmetric breakdown voltage design where the first semiconductor device has a first breakdown voltage and the second semiconductor device has a second breakdown voltage that differs from the first. This asymmetry in breakdown characteristics, combined with the anti-serial arrangement, creates more linear overall device characteristics that reduce harmonic distortion while maintaining ESD protection functionality.
2Object-generated harmful factors
If additional capacitance elements are added to balance transmission paths, then even harmonic distortion is reduced, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent merges the capacitance balancing function directly into the transmission path structure by adding capacitance elements (such as capacitive pads or interconnect structures) to either the first or second transmission path. This integration approach combines multiple functions (signal transmission and capacitance balancing) into a unified structure, reducing the need for separate discrete components and simplifying the manufacturing process.
Solution Approach 2:
The capacitance balancing is achieved by applying local modifications to specific transmission paths rather than changing the entire device structure. By adding capacitance elements only to the first or second transmission path as needed, the patent achieves even harmonic distortion reduction while minimizing the impact on overall device complexity and manufacturing difficulty.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces even harmonic distortion by more than 20 dB, providing improved linearity and cost-effectiveness in ESD protection for RF applications while maintaining low harmonic generation.
Implementation Method 1
the total capacitance of elements in the second transmission path comprises at least a portion of a self-capacitance of the conductive link
Data Source
AI summary
An overvoltage protection device includes first and second semiconductor devices arranged in an anti-serial configuration with a conductive link connected between the first and second semiconductor devices at a central node of the overvoltage protection device, a first terminal connection to a terminal of the first semiconductor device that is opposite from the central node, a second terminal connection to a terminal of the second semiconductor device that is opposite from the central node. A total capacitance of elements in a first transmission path that is between the first terminal connection and the central node substantially matches a total capacitance of elements in a second transmission path that is between the second terminal connection and the central node. The total capacitance of elements in the second transmission path includes a self-capacitance of the conductive link.