Antiferroelectric Memory Devices With Ferroelectric Layers
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Solution Overview
Problem
Current memory devices face challenges in effectively utilizing antiferroelectric materials for data storage due to limitations in manufacturing processes and integration with ferroelectric layers, leading to inefficiencies in polarization switching and memory retention.
Innovation Solution
The development of antiferroelectric memory devices with a layered structure comprising antiferroelectric layers, doped semiconductor layers, and ferroelectric layers, along with specific manufacturing methods to form three-dimensional arrays and tunnel junctions, enhances data storage capabilities by optimizing the antiferroelectric and ferroelectric material interactions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If antiferroelectric materials are used for data storage, then memory retention is improved, but manufacturing complexity increases due to integration challenges with ferroelectric layers
Solution Approach 1:
The patent combines antiferroelectric and ferroelectric layers into a unified memory structure where both materials coexist in the same device stack. The antiferroelectric layer provides non-volatile retention while the ferroelectric layer enables fast switching, and their integration is achieved through conformal deposition processes that deposit both layers sequentially on the same substrate without requiring separate manufacturing steps.
Solution Approach 2:
The invention uses composite material structures where antiferroelectric and ferroelectric materials are layered together to create a hybrid memory element. This composite approach allows the device to leverage the complementary properties of both materials - the antiferroelectric material's stability and retention characteristics combined with the ferroelectric material's rapid polarization switching - while maintaining manufacturability through standard thin-film deposition techniques.
2Manufacturing precision
If layered structure with doped semiconductor and ferroelectric layers is implemented, then polarization switching control is improved, but device structure complexity increases
Solution Approach 1:
The patent applies local quality by doping the semiconductor layer at specific locations and interfaces within the layered structure. The doped semiconductor regions are positioned precisely at the boundaries between the antiferroelectric and ferroelectric layers to enhance polarization control locally where it is most needed, rather than uniformly throughout the entire device. This localized doping approach improves switching control while minimizing the overall structural complexity.
Solution Approach 2:
The memory device is segmented into distinct functional layers - antiferroelectric layer, doped semiconductor layer, and ferroelectric layer - each performing a specific function. This segmentation allows for independent optimization and control of polarization switching in each layer, with the doped semiconductor layer acting as an intermediate control element that mediates between the antiferroelectric and ferroelectric components, thereby improving overall switching control without requiring a monolithic complex structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves data storage efficiency by enabling precise control over polarization states and retention, leading to enhanced memory performance and reliability in antiferroelectric memory devices.
Implementation Method 1
A ferroelectric material refers to a material that displays spontaneous polarization of electrical charges in the absence of an applied electric field. The net polarization P of electrical charges within the ferroelectric material is non-zero in the minimum energy state.
Implementation Method 2
Each of the at least one antiferroelectric memory cell includes a first electrode, a second electrode and a stack containing an antiferroelectric layer and a doped semiconductor layer or a ferroelectric layer located between the first and the second electrodes.
Implementation Method 3
The different orientations of the dipole moment of the ferroelectric material may be detected by the electric field generated by the dipole moment of the ferroelectric material.
Data Source
AI summary
An antiferroelectric memory device includes at least one antiferroelectric memory cell. Each of the at least one antiferroelectric memory cell includes a first electrode, a second electrode and a stack containing an antiferroelectric layer and a doped semiconductor layer or a ferroelectric layer located between the first and the second electrodes.


