Solid-State Devices TRIZ Cases

A mesh-type source electrode with an aperture array in a vertical organic light-emitting transistor improves light emission efficiency and stability.

Integrating sensing conductor blocks into the thin film transistor layer eliminates separate ITO layers, reducing manufacturing complexity and cost.

Segmenting pixel defining layers into inorganic and organic materials boosts adhesive strength to wiring, eliminating extra deposition steps.

An intermediate layer connects the channel body side surface to the source layer in a stacked semiconductor memory device.

Stacking serially connected resistive memory cells in an insulating layer improves programming efficiency while maintaining reliable data storage.

Doping free radical molecular material into a hole injection layer enhances charge transfer and conductivity within organic electroluminescent devices.

A spin torque oscillator stack provides initial non-vertical torque to the free layer magnetization in an MRAM cell.

Segmented cutting along contacting boundary lines reduces failure rates while increasing display panel yield from mother substrates.

A polysiloxane interlayer shields carrier transport layers from dissolution in polar solvents, maintaining structural integrity and device reliability.

Adhesion supporter layer joins flexible encapsulation and pressure sensitive adhesive, preventing delamination during bending.

Moving the read wire above the surface electrode reduces resistance and time constant, boosting signal read speed while maintaining the fill factor.

Doping alkaline earth metals into electron transmission layers balances electron and hole mobility to boost luminous efficiency and extend service life.

A protective inorganic film prevents alkaline dissolution and bank residue contamination of the hole injection layer, maintaining stable work function.

CuAl alloy and TiN composite layers lower ON-resistance while preventing wafer warp during manufacturing.

A vertical channel thin-film transistor substrate uses a semiconductor pattern with source and drain electrodes on opposing surfaces to enhance electrical conductivity.

Positioning a multiplexer between sensing pads reduces pad line quantity and minimizes dead space in the non-display area of the substrate.

Fin-shaped active regions with graded source/drain doping maintain channel connection reliability despite high integration density.

Segmenting conductive material into isolated trenches prevents pinhole defects and reduces power consumption while maintaining device reliability.

A stacked substrate light emitting device separates driving circuits across two layers to enable high-density element arrangement.

Styrene-maleimide copolymers maintain high glass transition temperatures while enabling orthogonal solvent processing for printed capacitors.

Single-crystal epitaxial silicon replaces polysilicon in thin-film storage transistors to enhance electron mobility.

Merging pixel definition and spacer formation into one mask reduces production costs while preventing electrode damage from indium migration.

Controlled oxidative trim addresses bulging and tapering in high aspect ratio capacitor electrodes, enhancing structural integrity and memory cell reliability.

Ion-conductive layer creates pronounced threshold voltage to reduce cross-talk in passive-matrix electrochromic displays.

A light emitting element uses a metal bulk support structure to improve heat dissipation and current spreading efficiency.

Semiconductor heightening portions form coplanar bonding surfaces with light-emitting mesas to simplify micro LED display fabrication.

Segmented conductive layers apply spin-orbit torque to magnetic tunnel junctions in MRAM devices.

Vertical metal posts replace large cone structures to reduce contact area, enabling higher resolution imaging.

Identical transistor structures and preliminary programming sequences reduce leakage currents, ensuring stable data storage in nonvolatile memory devices.

Stacking main and sub-channels into a U-shaped form doubles memory cell density while simplifying fabrication steps for select transistors.

Segmented frames with asymmetric protruding portions distribute gravitational stress to maintain alignment precision in large-area display device manufacturing.

Plasma doping creates a conformal channel stop impurity region that eliminates dark current and noise caused by incomplete ion implantation coverage.

A segmented array substrate with independent sub-TFT circuits controls comb-like pixel electrodes to enlarge the visible range of each single-side view field.

Segmenting the gate into regions with different doping concentrations adjusts the threshold voltage without modifying epitaxial growth parameters.

Replacing red phosphors with orange and green fluorescent substances shifts emission peaks to improve color rendering while maintaining luminous efficiency.

Uniform gate electrode thickness in 3D nonvolatile memory reduces deposition complexity and off-leakage current.

Bidirectional rectifying two-state resistors suppress reading crosstalk in RRAM crossbar arrays by reducing leakage paths.

Hollow portions in touch electrodes reduce parasitic capacitance with the cathode, improving touch report rates in flexible displays.

A CMOS image sensor recess sidewall angle less than 90 degrees reduces light loss.

A light-confining layer with a lower refractive index than the electroluminescence layer confines lateral light within an organic EL element.

A segmented overcoat layer with protruding and depressed portions forms a micro lens array that refracts trapped light to improve extraction efficiency.

A self-aligned fourth polysilicon layer increases inter-poly dielectric surface area in floating gate memory devices.

A processing chamber maintains at least 10 atm pressure to drive ammonia gas into tunnel oxide layers.

A three-dimensional memory device uses dielectric fillers with side protrusions to space conductive layers within a multi-layer stacked structure.

A display apparatus uses a nonplanar first inorganic layer with increased peripheral roughness to block impurity spread.

An embedded sealing ring secures electrode elements in a grooved substrate, eliminating insulation layer deterioration that causes copper peeling.

Alternating cationic and anionic polyelectrolyte layers seal pinhole defects in inorganic oxide barriers, reducing oxygen transmission rates.

Integrating ferroelectric layers into antiferroelectric memory devices resolves manufacturing complexity while enhancing data retention and reliability.

Laser emitter etches faulty display panel regions while a guide adjusts local temperatures to control etching depth.

Alternately stacked first and second oxide layers in an encapsulation film enhance bending endurance for flexible displays.