Fin-Shaped Active Region Source/Drain Doping for NAND Flash Reliability
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Solution Overview
Problem
As memory devices become more highly integrated, the reduced area of source/drain regions in NAND flash memory devices leads to deteriorated reliability and operational characteristics, causing channel disconnection due to the expansion of depletion layers under increased electric fields.
Innovation Solution
The implementation of fin-shaped active regions with a gate structure and source/drain regions having a first impurity region with a higher doping concentration than second impurity regions, which are disposed in the active region and sidewalls respectively, to maintain effective channel connection and prevent disconnection during programming and erasing operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If memory devices are highly integrated to increase device integration, then device integration is improved, but source/drain region area is reduced leading to channel disconnection
Solution Approach 1:
The source/drain region is extended from a two-dimensional planar structure into the third dimension by forming a fin-shaped active region that protrudes from the substrate. This vertical extension increases the effective area of the source/drain region without increasing the planar footprint, thereby maintaining channel connection reliability while enabling higher device integration.
Solution Approach 2:
The doping concentration is varied within the source/drain region by forming multiple impurity regions with different doping levels. The first impurity region has a higher doping concentration than the second impurity region, which allows optimization of electrical characteristics and prevention of depletion layer expansion that could cause channel disconnection.
2Productivity
If source/drain region area is reduced to increase integration, then device integration is improved, but operational characteristics deteriorate
Solution Approach 1:
By forming the active region as a fin structure that protrudes vertically from the substrate, the source/drain region gains additional area in the vertical dimension. This maintains sufficient effective area for proper device operation while allowing higher integration density in the planar direction.
Solution Approach 2:
Different regions of the source/drain structure are doped with different concentrations to optimize local electrical properties. The first impurity region with higher doping concentration is positioned to ensure proper electrical characteristics, while the second impurity region with lower doping concentration is positioned in the sidewalls, creating locally optimized conditions for operational reliability.
3Reliability
If program voltage or pass voltage is applied to prevent program inhibit, then program inhibition prevention is improved, but electric field increases causing depletion layer expansion
Solution Approach 1:
The doping concentration parameter is optimized by creating impurity regions with different doping levels. The higher doping concentration in the first impurity region reduces the depletion layer width for a given electric field strength, allowing program inhibition prevention while maintaining a larger effective source/drain area compared to uniform doping.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the operational reliability and characteristics of non-volatile memory devices by ensuring effective program inhibition and data retention, even as the device integration increases.
Implementation Method 1
performing an ion implantation process to form source/drain regions in the active region
Data Source
AI summary
A method of fabricating a semiconductor device includes forming a fin-shaped active region including opposing sidewalls and a surface therebetween protruding from a substrate, forming a gate structure on the surface of the active region, and performing an ion implantation process to form source/drain regions in the active region at opposite sides of the gate structure. The source/drain regions respectively include a first impurity region in the surface of the active region and second impurity regions in the opposing sidewalls of the active region. The first impurity region has a doping concentration that is greater than that of the second impurity regions. Related devices are also discussed.