Semiconductor Memory Device Intermediate Layer Connectivity
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Solution Overview
Problem
In three-dimensional semiconductor memory devices, the existing etching processes often affect the memory film on the side walls of memory holes, leading to variations and deterioration in memory cell characteristics, and there is a need for improved connectivity between the channel body and the source layer to reduce contact resistance and enhance operational speed.
Innovation Solution
A semiconductor memory device structure where a semiconductor body with a charge storage film is formed within memory holes, and an intermediate layer connects the side surface of the channel body to the source layer, allowing for reduced contact resistance and selective etching of the memory film on the side walls, thereby maintaining the integrity of the memory cells and enabling higher speed operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If etching is used to remove the memory film from the bottom portion of the memory hole to connect the channel body with the source layer, then connectivity between channel body and source layer is improved, but the memory film on the side wall of the memory hole is also affected causing characteristic variations
Solution Approach 1:
The patent divides the memory film removal process into two distinct segments: (1) selective removal of memory film from the bottom portion of the memory hole to establish channel-source connection, and (2) preservation of memory film on the side wall for charge storage function. This segmentation allows each region to be treated differently, achieving both connectivity and film integrity.
Solution Approach 2:
The patent applies different etching conditions to different locations within the memory hole. The bottom portion undergoes aggressive etching to remove memory film completely for connectivity, while the side wall region maintains memory film through controlled etching parameters. This local differentiation resolves the contradiction between connectivity and film preservation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves the reliability and operational speed of the semiconductor memory device by reducing contact resistance and preventing characteristic variations in memory cells, while allowing for smaller block sizes and increased bit lines without increasing block size, thus enhancing overall performance.
Implementation Method 1
a charge storage film provided between the semiconductor body and the plurality of electrode layers
Implementation Method 2
At least one of the first layer and the second layer has conductivity and is connected with the intermediate layer
Data Source
AI summary
According to one embodiment, a first layer; a stacked body provided above the first layer and including a plurality of electrode layers separately stacked each other; a second layer provided between the first layer and the stacked body; an intermediate layer provided between the first layer and the second layer; a semiconductor body provided in the stacked body, the second layer, the intermediate layer and the first layer, the semiconductor body extending in a stacking direction of the stacked body; and a charge storage film provided between the semiconductor body and the plurality of electrode layers. The semiconductor body includes a side surface connected with the intermediate layer in the vicinity of a boundary between the first layer and the second layer. At least one of the first layer and the second layer has conductivity and is connected with the intermediate layer.