Memory Device Ground Selection Transistor Leakage Reduction
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Solution Overview
Problem
As semiconductor design rules shrink, flash memory devices face electrical issues such as leakage during programming operations, which affect the stability and efficiency of data storage in nonvolatile memory devices.
Innovation Solution
The implementation of memory devices with ground selection transistors and memory cell transistors having the same structure, along with a specific programming method that involves applying distinct voltages to these transistors to prevent leakage and ensure stable data storage, including the use of a common source line to connect the ground selection transistors across multiple memory arrays.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ground selection transistors and memory cell transistors have different structures, then programming operations can be performed, but leakage currents occur during programming affecting stability
Solution Approach 1:
The patent makes the ground selection transistors and memory cell transistors have the same structure, including identical gate insulating layer, charge storage layer, middle gate insulating layer, and gate layer configurations. This structural homogeneity ensures uniform electrical characteristics across all transistors, preventing leakage currents during programming operations and improving data storage stability.
2Productivity
If design rule is reduced to increase integration, then device density improves, but electrical problems such as leakage arise during programming
Solution Approach 1:
By making all transistors in the memory array have identical structures with matching gate insulating layers, charge storage layers, and gate layers, the patent ensures uniform threshold voltages and electrical characteristics. This homogeneity prevents leakage currents even when design rules are reduced, allowing high integration density without compromising programming reliability.
3Reliability
If ground selection transistors are programmed before memory cell transistors, then leakage is prevented, but programming time increases
Solution Approach 1:
The patent implements a two-stage programming sequence where ground selection transistors are programmed first to establish proper electrical potential and prevent leakage, followed by memory cell transistor programming. This preliminary action ensures stable programming conditions are established before data writing, improving reliability without excessive time penalty.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the stability and efficiency of programming and erasing operations by reducing leakage currents and maintaining the electric potential of active regions, thereby improving the overall performance of nonvolatile memory devices.
Implementation Method 1
a first charge storage layer disposed on the first gate insulating layer
Implementation Method 2
a first middle gate insulating layer disposed on the first charge storage layer
Data Source
AI summary
A memory device, including a first ground selection transistor, a first string selection transistor, and first memory cell transistors disposed in series between the first ground selection transistor and the first string selection transistor, wherein the first ground selection transistor and the first memory cell transistors have a same structure. A method of programming the memory device may include programming the ground selection transistor before programming the memory cell.