Anti-fuse Cell Structure with Dedicated BE Line
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Solution Overview
Problem
Current anti-fuse cell structures and arrays face challenges such as the risk of breakdown of selective transistors, large chip area requirements, and poor uniformity.
Innovation Solution
The proposed solution involves an anti-fuse cell structure with a first anti-fuse transistor and a selection transistor, where a Blow Enable (BE) line is connected to the anti-fuse transistor, allowing programming without the need to turn on the selection transistor, thus preventing damage and optimizing space usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high voltage is applied to program the anti-fuse transistor through the selection transistor, then the anti-fuse transistor can be programmed, but the selection transistor may break down due to excessive voltage
Solution Approach 1:
The patent segments the voltage application path by introducing a dedicated BE line that connects directly to the anti-fuse transistor's source/drain region, separating the programming voltage path from the selection transistor. This allows high voltage to be applied only where needed without passing through the selection transistor, thus preventing its breakdown while enabling successful programming of the anti-fuse transistor.
2Ease of operation
If the selection transistor is always on to enable programming, then programming can be performed, but the chip area increases due to additional control circuitry
Solution Approach 1:
The patent extracts the voltage control function from the selection transistor by introducing a dedicated BE line that directly controls the anti-fuse transistor's programming state. This eliminates the need for complex control circuitry to manage the selection transistor's on/off state during programming, reducing chip area while maintaining full programming capability.
3Area of stationary object
If multiple anti-fuse transistors are arranged in a compact array, then chip area is reduced, but uniformity of programming and reading operations deteriorates
Solution Approach 1:
The patent applies local quality by providing dedicated BE lines to specific anti-fuse transistors that require programming, rather than using a global control mechanism. This localized approach ensures that each anti-fuse transistor receives precise voltage control independent of its position in the array, maintaining programming uniformity even in compact arrangements with varying electrical characteristics.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces the risk of selection transistor breakdown, minimizes chip area, and improves uniformity by allowing direct high-voltage application to the anti-fuse transistor through the BE line.
Implementation Method 1
When the anti-fuse device is programmed (high voltage is applied), the dielectric layer is broken down by high electric field, and an electrical connection is formed between the conductive layers on both sides
Data Source
AI summary
An anti-fuse cell structure includes: a first anti-fuse transistor having a first end and a second end; a first selection transistor having a first end and a second end, the first end of the first selection transistor being electrically connected to the second end of the first anti-fuse transistor; and a Blow Enable (BE) line electrically connected to a first end of the first anti-fuse transistor, and configured to perform programming operation on the first anti-fuse transistor.