Antifuse Control Circuit Activation Delay for Voltage Stability
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Solution Overview
Problem
During the power-up of semiconductor memory devices, existing technologies face challenges in stabilizing control voltages necessary for antifuse read operations, leading to potential data reading failures due to unstable voltage levels.
Innovation Solution
An antifuse control circuit comprising a high voltage generator and a sensing controller that generates a read enable signal only after an activation delay, once the read voltage reaches a reference level, ensuring the voltage stabilizes before data reading commences.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the antifuse read operation is performed quickly during power-up, then the productivity is improved, but the voltage stability deteriorates
Solution Approach 1:
The patent applies preliminary action by introducing an activation delay period before the antifuse read operation. During this delay period, the read voltage is allowed to stabilize to the reference level before data reading commences. This ensures voltage stability is established beforehand, resolving the contradiction between fast operation and voltage stability.
2Loss of time
If the read voltage is generated immediately upon power-up detection, then the time consumption is reduced, but the reliability of data reading deteriorates
Solution Approach 1:
The patent employs feedback by continuously monitoring the read voltage level and using this feedback to control the activation delay. The delay duration is determined by the sensed level of the read voltage, ensuring the voltage reaches the reference level before data reading starts. This feedback mechanism ensures reliable data reading while minimizing unnecessary delays.
Data Source
AI summary
A method of reading an antifuse in a semiconductor memory device during a power-up routine includes; generating a read voltage used during an antifuse read operation performed during the power-up routine to read data stored in an antifuse cell array of the antifuse, and beginning execution of the antifuse read operation only after an activation delay has elapsed following a sensing of the level of the read voltage.