Anti-Fuse Gate Structure for Stable Oxide Breakdown
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Solution Overview
Problem
The breakdown of anti-fuse devices in DRAM chips is unstable, leading to inconsistent product yield due to some products not being broken down when connected to a breakdown voltage.
Innovation Solution
An anti-fuse device with an anti-fuse gate and oxide layer having sharp corners embedded in a substrate, along with a shallow trench isolation structure and doped regions, which increases the number of breakdown points and the effective area of the oxide layer, enhancing uniformity and consistency of product performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the anti-fuse gate oxide layer uses a conventional flat structure, then the manufacturing process is simple, but the breakdown process is unstable and product yield is inconsistent
Solution Approach 1:
The patent applies curvature by replacing the conventional flat anti-fuse gate oxide layer with an arc-shaped structure. The gate oxide layer is formed with a curved profile where the thickness varies continuously, creating multiple potential breakdown points along the arc. This curvature design ensures that during the breakdown process, electrical discharge can occur at multiple locations simultaneously, improving breakdown stability and product yield consistency without significantly complicating the manufacturing process.
2Productivity
If the anti-fuse device size is reduced, then the integration density increases, but the effective area of the oxide layer decreases leading to unstable breakdown
Solution Approach 1:
The patent transitions from a two-dimensional flat oxide layer to a three-dimensional arc-shaped structure. By introducing the vertical dimension and curvature, the effective area of the oxide layer is increased within the same footprint. The arc shape creates additional surface area along the curved profile, providing more breakdown points and improving reliability even as the overall device size is reduced for higher integration density.
3Device complexity
If the anti-fuse gate is fully embedded in the substrate, then the device structure is compact, but the oxide layer has insufficient breakdown points leading to unstable performance
Solution Approach 1:
The patent segments the gate oxide layer into multiple thickness regions along the arc profile, creating zones of varying electrical field strength. The arc-shaped structure naturally divides the oxide layer into segments with different curvatures and thicknesses, each contributing to the breakdown process. This segmentation ensures multiple initiation points for breakdown while maintaining the compact embedded structure, resolving the conflict between compactness and reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design improves the uniformity and consistency of anti-fuse devices by providing multiple breakdown points and a larger effective area for the oxide layer, even in smaller sizes, thus stabilizing the breakdown process and improving product yield.
Implementation Method 1
the portion of the anti-fuse gate embedded in the substrate has one or more sharp corners... provides multiple breakdown points... enhances uniformity and consistency of product performance
Implementation Method 2
when the anti-fuse device has defective storage units, replace the defective storage units to repair the DRAM... connected to a breakdown voltage
Data Source
AI summary
An anti-fuse device includes: a substrate; an anti-fuse gate, partially embedded in the substrate, a portion of the anti-fuse gate embedded in the substrate having one or more sharp corners; and an anti-fuse gate oxide layer, located between the anti-fuse gate and the substrate.