Antifuse Memory Cell Programming Path Bypasses Read Transistor
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Solution Overview
Problem
Conventional nonvolatile memory cells with antifuse components and read transistors are prone to damage during programming due to high voltages affecting the gate dielectric layer, leading to reduced lifetime and failure of memory cells.
Innovation Solution
A nonvolatile memory cell design incorporating an antifuse component and read transistor structure where the programming current bypasses the read transistor, reducing damage during programming, and utilizing a single polysilicon process for integration into existing logic transistor flows without requiring double polysilicon or stacked gate members.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional nonvolatile memory cells use high voltage programming through the read transistor, then programming capability is achieved, but the gate dielectric layer suffers damage leading to reduced lifetime and failure
Solution Approach 1:
The memory cell is segmented into distinct functional paths: a programming path through the antifuse component that bypasses the read transistor, and a read path through the read transistor that operates at low voltage. This segmentation allows each component to operate in its optimal voltage regime, preventing gate dielectric damage to the read transistor while maintaining programming capability through the antifuse component.
Solution Approach 2:
The antifuse component acts as an intermediary element that handles the high voltage programming function, protecting the read transistor from direct exposure to damaging high voltages. The antifuse component serves as a mediator that enables programming capability while isolating the sensitive read transistor from harmful electrical stress.
2Reliability
If double polysilicon or stacked gate members are used to protect against high voltage damage, then reliability is improved, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The harmful high voltage programming function is extracted from the read transistor and assigned to a separate antifuse component. This extraction eliminates the need for complex protective structures like double polysilicon or stacked gate members in the read transistor, as the read transistor no longer needs to withstand high voltages. The complexity is reduced by separating the programming function from the read transistor structure.
Solution Approach 2:
Instead of making the read transistor more complex and robust to handle high voltages directly, the invention inverts the approach by making the read transistor simple and sensitive, and placing the high voltage handling function in a separate antifuse component. This inversion simplifies the read transistor structure while maintaining reliability.
3Ease of manufacture
If existing logic transistor processes are used without modification, then manufacturing simplicity is maintained, but integration of antifuse components and read transistors becomes difficult
Solution Approach 1:
The antifuse component is designed with multi-functionality, serving both as a programming element capable of withstanding high voltages and as an integral part of the memory cell structure. This universal design allows the same basic process flow to be used for both logic transistors and memory cells, enabling easy integration into existing CMOS processes without requiring separate specialized fabrication lines.
Solution Approach 2:
The invention utilizes parameter changes in the antifuse component, such as varying the thickness and material composition of the gate dielectric layer, to enable the component to withstand high programming voltages while maintaining compatibility with standard CMOS fabrication processes. These parameter adjustments allow the memory cell to be integrated into existing logic transistor processes with minimal modifications.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances the reliability and longevity of nonvolatile memory cells by minimizing damage to the read transistor during programming and allows for flexible physical design tailored to existing process flows, maintaining compatibility with existing logic processes.
Implementation Method 1
The nonvolatile memory cells include one-time programmable ("OTP") memory cells with an antifuse component. Before programming, the antifuse component is in an open or relatively high resistive state, and after programming, the antifuse component is in a relatively conductive state
Data Source
AI summary
An electronic device can include a nonvolatile memory cell, wherein the nonvolatile memory cell can include a substrate, an access transistor, a read transistor, and an antifuse component. Each of the access and read transistors can include source/drain regions at least partly within the substrate, a gate dielectric layer overlying the substrate, and a gate electrode overlying the gate dielectric layer. An antifuse component can include a first electrode lying at least partly within the substrate, an antifuse dielectric layer overlying the substrate, and a second electrode overlying the antifuse dielectric layer. The second electrode of the antifuse component can be coupled to one of the source/drain regions of the access transistor and to the gate electrode of the read transistor. In an embodiment, the antifuse component can be in the form of a transistor structure. The electronic device can be formed using a single polysilicon process.