Anti-Fuse Memory Cell State Detection Circuit

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing methods for detecting the state of anti-fuse memory cells are inaccurate due to resistance fluctuations and limitations in detection circuits, leading to decreased chip yield.

Innovation Solution

A circuit comprising a current providing module, an anti-fuse memory cell array, and a comparator is used to detect the state of anti-fuse memory cells by applying a constant current and comparing the resulting voltage with a reference voltage, thereby accurately determining the storage state.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional detection circuits are used to detect anti-fuse memory cell state, then the detection process is simple, but the detection accuracy is low due to resistance fluctuations

Engineering Contradiction:
Improvedetection accuracyVSAvoidcircuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent introduces a current providing module as an intermediary component that supplies constant current to the anti-fuse memory cell during detection. This mediator stabilizes the detection conditions by eliminating current fluctuations, thereby improving detection accuracy without significantly complicating the overall circuit structure

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the detection parameter from voltage-based detection to current-based detection. By using a constant current source and measuring the voltage drop across the anti-fuse memory cell, the detection method becomes more accurate as it directly reflects the resistance state of the cell without being affected by supply voltage fluctuations

Inventive Principle:
Principle #35Parameter changes

2Reliability

If conventional detection methods are used, then the detection circuit is simple, but false determinations occur leading to decreased chip yield

Engineering Contradiction:
Improvechip yieldVSAvoiddetection circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The comparator acts as an intermediary that compares the detected voltage against a reference voltage threshold. This intermediary component eliminates false determinations by providing a clear decision boundary, ensuring reliable detection results and improving chip yield through accurate pass/fail determination

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent implements a feedback mechanism where the detection result is compared against a reference voltage, and the comparator output provides feedback on the actual state of the anti-fuse memory cell. This feedback loop ensures accurate detection by continuously verifying the cell state against known good/bad thresholds

Inventive Principle:
Principle #23Feedback

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution enhances detection accuracy by reducing false determinations and maintaining consistent chip performance, improving the reliability of anti-fuse memory cell state detection.

Implementation Method 1

a current providing module connected to a first node and used to provide constant current

Methodology Applied
Scientific EffectConstant current:

Implementation Method 2

a comparator, herein a first input end of the comparator is connected to the first node, a second input end of the comparator is connected to a first reference voltage

Methodology Applied
Scientific EffectVoltage comparison:

Data Source

PatentUS11817159B2Circuit for detecting anti-fuse memory cell state and memory
Publication Date: 2023.11.14 CHANGXIN MEMORY TECH INC
  • US11817159B2 patent drawing
  • US11817159B2 patent drawing
  • US11817159B2 patent drawing

AI summary

A circuit for detecting an anti-fuse memory cell state includes a current providing module connected to a first node and used to provide constant current; an anti-fuse memory cell array connected to the first node and including at least one bit line, the at least one bit line is connected to a plurality of anti-fuse memory cells and the first node; and a comparator, a first input end of the comparator is connected to the first node and a second input end of the comparator is connected to a first reference voltage, and used to detect a storage state of an anti-fuse memory cell to be tested in the anti-fuse memory cell array.