Anti-Fuse Programming Circuit With Voltage Stress Suppression
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Solution Overview
Problem
Existing anti-fuse circuits in semiconductor devices face challenges in accurately detecting the resistance value of anti-fuse elements due to high voltage stress on peripheral circuits, which can lead to deteriorated transistor characteristics and reduced detection accuracy.
Innovation Solution
A semiconductor device configuration that includes a first power supply, a second power supply, a third power supply with a higher potential, and a fourth power supply with a more negative potential, along with a driver transistor and a decision circuit connected to the first and second power supplies, allowing for controlled electrical conduction of the anti-fuse element without complicating the structure or manufacturing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a high voltage is applied to one end of the anti-fuse element to render it electrically conductive, then the anti-fuse element can be programmed, but the high voltage may rise to an extremely high level and destruct peripheral circuits or deteriorate transistor characteristics
Solution Approach 1:
A driver transistor is introduced as an intermediary component between the power supply and the anti-fuse element. The driver transistor controls the voltage applied to the anti-fuse element, ensuring that the voltage does not exceed a predetermined level that could damage peripheral circuits. This mediator protects the peripheral circuits while still enabling reliable programming of the anti-fuse element.
Solution Approach 2:
The invention changes the voltage parameter by introducing a fourth power supply with a potential more negative than the second power supply. This creates a controlled voltage difference across the anti-fuse element that is sufficient for programming but limited by the driver transistor to prevent excessive voltage stress on peripheral circuits.
2Object-affected harmful factors
If larger size transistors are connected to the low potential side to supply high voltage, then the high voltage can be suppressed, but the parasitic capacitance and leakage current increase, reducing detection accuracy of the decision circuit
Solution Approach 1:
The invention changes the voltage parameters by introducing a fourth power supply with a potential more negative than the second power supply. This creates a controlled voltage difference that suppresses high voltage stress on peripheral circuits while maintaining smaller transistor sizes that have lower parasitic capacitance and leakage current, thus improving decision circuit detection accuracy.
Solution Approach 2:
The driver transistor is positioned locally at the node between the third power supply and the anti-fuse element, providing targeted voltage control only where needed for anti-fuse programming, without affecting the overall circuit architecture or requiring larger transistors elsewhere in the system.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration ensures suppressed voltage stress on peripheral circuits, improving the accuracy of resistance value detection in anti-fuse elements by applying voltages outside the standard range, thus ensuring reliable rupture of the anti-fuse element with reduced parasitic capacitance and leakage current.
Implementation Method 1
an anti-fuse element that is normally in an insulated state and that is rendered electrically conductive when a high voltage is applied thereto in order to destruct the state of insulation during the write process
Implementation Method 2
a driver transistor whose source is connected to the third power supply, whose gate is connected to a control node and whose drain is connected to the one end of the anti-fuse element
Data Source
AI summary
A semiconductor device includes a first high potential power supply, a second low potential power supply, a third power supply having a potential higher than the first, a fourth power supply having a potential more negative than the second, and an anti-fuse element having a node at each end, one of which is connected to the fourth power supply. A driver transistor has a source connected to the third power supply, a gate connected to a control node and a drain connected to one end of the anti-fuse element. A decoding circuit includes a load transistor connected between the third power supply and the control node and at least one selection transistor connected between the second power supply and the control node. A decision circuit is connected to the first and second power supplies. The decision circuit decides the resistance value of the anti-fuse element. The anti-fuse element is rendered electrically conductive in response to activation of the driver transistor as selected by the decoding circuit. The decision circuit decides whether or not the anti-fuse element has been rendered electrically conductive.