Antifuses Integrated on Semiconductor-on-Insulator Substrates
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Solution Overview
Problem
Antifuses occupy significant space in integrated circuits due to their large size, necessitating a solution that reduces circuit real estate while maintaining functionality.
Innovation Solution
The use of a buried oxide (BOX) layer as the dielectric in fully depleted semiconductor-on-insulator (FDSOI) substrates, where the BOX layer itself forms the antifuse, with top electrodes from active circuitry and bottom electrodes from wells in the substrate, allowing for vertical integration and reduced size without compromising programming efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional antifuse structures are used, then antifuse functionality is achieved, but circuit area is significantly consumed
Solution Approach 1:
The patent transitions from planar antifuse structures to vertically integrated 3D structures by utilizing the BOX layer as the dielectric medium between top electrodes (from active circuitry) and bottom electrodes (from substrate wells), thereby achieving antifuse functionality with reduced footprint area
Solution Approach 2:
The BOX layer serves dual purposes: as the insulating substrate for FDSOI circuitry and as the dielectric layer for antifuse formation, eliminating the need for separate antifuse dielectric layers and reducing overall structure complexity
2Area of stationary object
If smaller antifuse structures are used to reduce area, then circuit real estate is saved, but programming efficiency may be compromised
Solution Approach 1:
The patent utilizes high voltage devices (such as LDMOS transistors) to apply programming voltages that exceed the breakdown voltage of the BOX layer dielectric, enabling reliable antifuse programming despite the reduced size and thinner dielectric thickness of the vertical structure
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration achieves area savings in integrated circuits by vertically integrating antifuses with circuitry, enabling efficient programming and reading of resistance states using high voltage devices like LDMOS, while maintaining flexibility in device usage.
Implementation Method 1
a minimum programming voltage is needed across the antifuse dielectric (the BOX layer) in order to break down the dielectric and program it to a low resistance state
Data Source
AI summary
An integrated circuit (IC) system includes a substrate, a first doped well of a first polarity in the substrate, a first electrode in contact with the doped well, a buried oxide (BOX) in contact with the doped well in the substrate, a first IC device including a second electrode formed on the BOX, and fuse control circuitry coupled to the first electrode and the second electrode. The fuse control circuitry is configured to cause voltages to be applied to the first and second electrodes to change a resistance level of the BOX in the vicinity of the second electrode.