Avalanche Photodetector Edge Doping for Lower Leakage Current
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
High electric field strength at the edge portion of avalanche photodiode (APD) pixel arrays in solid-state imaging devices leads to increased leakage current and reduced breakdown voltage, making it difficult to enhance sensitivity while maintaining low electric field conditions.
Innovation Solution
A photodetector design that includes a semiconductor substrate and a first semiconductor layer forming a charge multiplication region, with a second semiconductor layer extending below the interface between the substrate and the first layer, reducing electric field strength by increasing the depletion layer distance and preventing leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the photodetector uses avalanche breakdown for charge multiplication, then the sensitivity for weak light detection is improved, but the electric field strength at the edge portion increases causing leakage current and reduced breakdown voltage
Solution Approach 1:
The patent applies local quality by creating different impurity concentration zones: the first semiconductor layer has a first impurity concentration in the charge multiplication region, while the second semiconductor layer has a lower second impurity concentration at the edge portion. This spatial variation in material properties allows the center to maintain high electric field for avalanche multiplication while the edge has reduced electric field to prevent leakage current.
Solution Approach 2:
The patent changes the impurity concentration parameter from uniform to graded distribution. By making the impurity concentration of the second semiconductor layer lower than that of the first semiconductor layer, the electric field distribution is modified to reduce peak field strength at the edge portion while maintaining sufficient field strength in the charge multiplication region for avalanche breakdown.
2Ease of manufacture
If the photodetector structure is simplified, then the manufacturing process is easier, but the ability to control electric field distribution is reduced
Solution Approach 1:
The photodetector is segmented into distinct semiconductor layers with different impurity concentrations. The first semiconductor layer contains the charge multiplication region with higher impurity concentration, while the second semiconductor layer at the edge has lower impurity concentration. This segmentation allows independent optimization of each region's electrical characteristics through separate impurity doping processes.
Solution Approach 2:
The patent introduces a vertical dimension to control electric field distribution by varying impurity concentration through the thickness of the semiconductor layers. The second semiconductor layer extends to a level below the interface between the semiconductor substrate and the first semiconductor layer, creating a three-dimensional impurity concentration profile that controls the electric field in the edge portion.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design effectively reduces electric field strength at the edge portion, improving breakdown voltage and preventing leakage current, thereby enhancing the sensitivity and reliability of the photodetector for weak light detection.
Implementation Method 1
a photoelectric converter including a charge multiplication region in which charges are multiplied by avalanche multiplication
Implementation Method 2
a photoelectric converter including a charge multiplication region
Data Source
AI summary
A solid-state imaging device includes: a p-type semiconductor substrate; an n-type first semiconductor layer located above the semiconductor substrate and forming a junction with the semiconductor substrate in the first area; and an n-type second semiconductor layer located between the semiconductor substrate and the first semiconductor layer in the second area outward of the first area and having an impurity concentration lower than an impurity concentration of the first semiconductor layer. The semiconductor substrate and the first semiconductor layer form APD1, and the second semiconductor layer extends to a level below an interface between the semiconductor substrate and the first semiconductor layer in a thickness direction of the semiconductor substrate.


