Avalanche Photodiode Pixel Layout for Noise and Aperture Ratio
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Solution Overview
Problem
Existing imaging devices face challenges in suppressing noise due to increased parasitic capacitance and voltage fluctuations in avalanche photodiodes, particularly in miniaturized designs where the quench circuit and readout wire lines interfere, leading to reduced aperture ratios and increased noise.
Innovation Solution
The imaging device incorporates a configuration with adjacent pixels having overlapping anode electrodes and insulating material, along with strategically placed anode and cathode vias, to minimize parasitic capacitance and voltage fluctuations, thereby reducing noise interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the quench circuit is arranged on the front surface side of the semiconductor substrate, then the circuit can be easily connected, but the aperture ratio is decreased by the space occupied by the circuit
Solution Approach 1:
The patent inverts the conventional arrangement by placing the quench circuit on the back surface side of the semiconductor substrate instead of the front surface side. This inversion allows the light incident area to be maximized while the quench circuit is arranged in the space that would otherwise be unused, thereby resolving the contradiction between ease of circuit connection and aperture ratio maintenance
2Measurement precision
If the pixel size is decreased to increase the number of pixels, then the resolution is improved, but the quench circuit must be arranged outside the active region which further decreases the aperture ratio
Solution Approach 1:
The patent utilizes the third dimension (depth) by arranging the quench circuit on the back surface side of the semiconductor substrate, below the active pixel region. This dimensional reorganization allows miniaturized pixels to maintain high aperture ratios while still accommodating the necessary quench circuitry, thus resolving the contradiction between increased pixel density and aperture ratio preservation
3Object-affected harmful factors
If the distance from the reference plane to the readout wire line is increased to reduce parasitic capacitance, then the noise is reduced, but the device height and complexity increase
Solution Approach 1:
The patent extracts the quench circuit from the front surface active region and relocates it to the back surface side of the semiconductor substrate. This separation removes the source of parasitic capacitance and noise interference from the light incident path, thereby reducing noise levels without requiring increased device height or complex multi-layer wiring structures
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses noise and maintains a high aperture ratio, improving the sensitivity and accuracy of the imaging device by optimizing the placement and connection of electrodes and vias between pixels.
Implementation Method 1
a plurality of light detection parts two-dimensionally arranged; an avalanche photodiode including: an anode region buried in an upper portion of the semiconductor substrate; a cathode region buried in the upper portion of the semiconductor substrate separated from the anode region
Implementation Method 2
an avalanche multiplication region defined between the anode and cathode regions. The avalanche multiplication region has an impurity concentration less than the anode and cathode regions
Data Source
Figure 1~2
Figure 3
Figure 4
AI summary
An imaging device includes a first chip (12). The first chip includes a first pixel (21) and a second pixel (21). The first pixel includes a first anode region (31) and a first cathode region (32), and the second pixel includes a second anode region (31) and a second cathode region (32). The first chip includes a first wiring layer (23). The first wiring layer includes a first anode electrode (37), a first anode via (38) coupled to the first anode electrode (37) and the first anode region (31), and a second anode via (38) coupled to the first anode electrode (37) and the second anode region (31).