Avalanche Photodiode Wiring Layout for Faster Control Signal Timing

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Solution Overview

Problem

The existing photoelectric conversion apparatuses face challenges in efficiently transmitting control signals to transistors that control avalanche multiplication, leading to signal transmission delays and discrepancies in photon detection, especially under high illuminance conditions.

Innovation Solution

The apparatus includes a first wiring layer with a greater thickness than a second wiring layer, specifically designed to transmit control signals to transistors and read signals from avalanche photodiodes, reducing signal transmission delay by increasing the thickness of the driving lines to lower wiring resistance and reduce signal transmission delay.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the wiring layer thickness is increased to reduce signal transmission delay, then the signal transmission speed improves, but the device complexity and manufacturing difficulty increase

Engineering Contradiction:
Improvesignal transmission speedVSAvoidwiring structure complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent applies different thicknesses to different wiring layers based on their specific functions. The first wiring layer (thickness d1) that transmits control signals is made thicker to reduce resistance and improve signal transmission speed, while the second wiring layer (thickness d2) that reads signals is made thinner. This local differentiation optimizes each wiring layer's performance for its specific purpose without unnecessarily increasing overall device complexity.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent introduces thickness as a dimensional parameter to solve the signal transmission problem. By varying the thickness dimension of different wiring layers, the patent achieves different resistance characteristics and signal transmission speeds without adding more wiring layers or changing the planar layout, thus avoiding increased device complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Loss of time

If the wiring layer thickness is increased to lower wiring resistance, then the signal transmission delay reduces, but the manufacturing precision requirements increase

Engineering Contradiction:
Improvesignal transmission delayVSAvoidwiring thickness control precision
Core Design Contradiction:
Loss of timeVSManufacturing precision

Solution Approach 1:

The patent differentiates wiring layer thicknesses based on functional requirements. The first wiring layer uses a greater thickness (d1) optimized for control signal transmission with lower resistance, while the second wiring layer uses a smaller thickness (d2) for signal reading. This local optimization reduces the need for high precision control across all wiring layers, as each layer's thickness is tailored to its specific function.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the thickness parameter of wiring layers to optimize signal transmission. By making the first wiring layer thicker, the resistance is reduced and signal transmission delay is minimized. This parameter change is applied selectively rather than uniformly, balancing performance improvement with manufacturing feasibility.

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If the first wiring layer thickness is made greater than the second wiring layer thickness, then the control signal transmission accuracy improves, but the device structure complexity increases

Engineering Contradiction:
Improvephoton detection accuracyVSAvoidmulti-layer wiring structure
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies different thicknesses to different wiring layers based on their specific functions. The first wiring layer (thickness d1) that transmits control signals is made thicker to reduce resistance and improve signal transmission speed, while the second wiring layer (thickness d2) that reads signals is made thinner. This local differentiation optimizes each wiring layer's performance for its specific purpose without unnecessarily increasing overall device complexity.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The multi-layer wiring structure serves multiple functions: the first wiring layer handles control signal transmission with optimized low resistance, while the second wiring layer handles signal reading. This functional differentiation within the wiring structure improves photon detection accuracy without requiring completely separate systems, thus balancing performance improvement with structural complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively reduces signal transmission delay and improves the accuracy of photon detection by ensuring synchronized control of avalanche multiplication across multiple pixels, enhancing the overall performance of the photoelectric conversion apparatus.

Implementation Method 1

increasing the thickness of the driving lines to lower wiring resistance and reduce signal transmission delay

Methodology Applied
Scientific EffectElectrical Resistance: Electrical Resistance

Implementation Method 2

Photoelectric conversion apparatuses that can detect weak light of a single-photon level by utilizing avalanche multiplication

Methodology Applied
Scientific EffectAvalanche multiplication: Avalanche Breakdown

Data Source

PatentUS20250107264A1Apparatus, system, and moving body
Publication Date: 2025.03.27 CANON KK
  • US20250107264A1 patent drawing
  • US20250107264A1 patent drawing
  • US20250107264A1 patent drawing

AI summary

An apparatus includes a plurality of avalanche photodiodes, a plurality of transistors connected to the plurality of avalanche photodiodes and configured to control occurrence of avalanche multiplication, a first wiring layer configured to transmit a control signal to be input to gates of the plurality of transistors, and a second wiring layer configured to read signals from the avalanche photodiodes, wherein the plurality of avalanche photodiodes includes a first group of avalanche photodiodes arranged in a first direction, wherein the plurality of transistors includes a first group of transistors connected to the first group of avalanche photodiodes, wherein the first wiring layer is connected in common to the first group of transistors, and wherein the first wiring layer has a thickness greater than a thickness of the second wiring layer.