Radiation Controlled Devices TRIZ Cases

A conductive and inner-layer isolation stack reduces light absorption, reflects more light, and cuts dark current and crosstalk in image sensors.

A flat photosensitive chip is bent during assembly to match the focal plane, improving imaging quality while preserving transportability and heat dissipation.

Spatially separated detector types on one substrate enable simultaneous broad-wavelength imaging with compact integration and less motion blur.

A segmented semiconductor layer and silicon nitride dielectric cut gate-drain capacitance while improving radiation hardness in photoelectric sensors.

An air grid in the inner isolation region cuts light absorption in small pixels, improving image sensor signal conversion and image quality.

Position-dependent nanopost diameters and shifted refractive index regions improve edge light capture and autofocus in compact image sensors.

Pre-formed substrate plugs improve stress distribution during layer bonding, reducing warpage and shrink in stacked semiconductor devices.

A dual vertical transfer gate layout improves electron readout, suppresses blooming noise, and preserves full well capacity in CMOS imaging pixels.

Subwavelength protrusions and a light-transmitting layer cut reflection losses and increase photon transmission in photosensitive pixel regions.

A corner ground region and pixel separation layout improve sub-pixel signal separation, boosting image sharpness and autofocus performance.

A nested low-doped surrounding region raises SPAD breakdown probability while improving carrier evacuation and reducing trapping during quenching.

A two-stage diversion groove mold improves packaging flow, prevents lead deformation, and forms a closed light window in camera modules.

A nested trench and depth-separated contact layout suppresses tunneling current, stabilizing avalanche amplification without enlarging pixels.

Segmented lower electrodes and contact plugs raise capacitance to improve global shutter efficiency and suppress image sensor noise.

Alternating-index trench layers replace metallic reflector cores to cut crosstalk and dark current in single-photon avalanche photodetectors.

Strategic placement of color filters with different refractive indices improves color reproducibility while suppressing noise and color mixing.

Uneven pixel isolation surfaces scatter reflected light, improving phase difference detection accuracy and reducing color mixing between adjacent pixels.

A supplemental oxide in the pixel PD area shields etching damage and plasma interference, cutting dark current in CMOS image sensors.

Vertical trench isolation and a shared microlens help small-pixel image sensors cut cross-talk, improve light capture, and support autofocus.

A shared floating diffusion with inner and outer DTI improves image sensor layout efficiency while preserving conversion gain and larger pixel transistors.

Monolithic PIN-TIA integration removes pad and wire-bond parasitics to improve optical receiver sensitivity, responsivity, and noise.

By stacking an accumulation unit above photoelectric conversion units, this case increases capacitance without enlarging chip area or noise.

A laterally spaced overflow contact diverts excess photocurrent from sensitive PIN pixels, reducing ROIC stress while preserving sensitivity.

Thicker control wiring lowers resistance and delay in avalanche photodiode arrays, improving synchronized multiplication and photon detection.

Vertical isolation and shared element regions free transistor placement in miniaturized light-detecting pixels while preserving image quality.

A reflective deep trench isolation structure redirects stray light between CMOS pixels, reducing cross-talk and improving quantum efficiency.

A vertically overlapping source follower gate enlarges effective gate area to cut pixel noise without increasing image sensor footprint.

Curved, separated absorption regions concentrate incident radiation while limiting carrier diffusion, improving MTF and quantum yield.

Trench-shaped pixel capacitors add flexible contact routing while cutting parasitic capacitance, enabling lower noise and smaller image sensors.

Separating the source follower transistor onto a stacked semiconductor layer enlarges channel area and cuts low-light RTS noise.

Separating photoelectric conversion and pixel transistors into stacked layers improves design flexibility and signal readout in solid-state imagers.

A protective layer shields the CIS photosensitive area during molding, avoiding dam sealing overflow while simplifying fan-out packaging.

A stacked pixel counter splits bit groups across layers to raise image sensor density while cutting through-electrodes and shared-wiring power.

Monolithic SiPM integration with aligned apertures, isolation trenches, and baffles cuts cross-talk while simplifying LIDAR receiver channels.

Parallel pixel wiring adds charge-holding capacitance beside the FD, cutting kTC noise without a larger or more complex capacitor structure.

An air-gap pixel isolation structure cuts crosstalk and dark current while protecting the substrate to improve image sensor yield and photosensitivity.

Different metal-grid opening sizes create uniform photodiodes with varied sensitivity, boosting dynamic range while reducing leakage.

A p-type region around deep trench isolation cuts leakage, dark current, optical crosstalk, and trapped-electron pixel noise in CMOS sensors.

A split readout and interconnection stack links visible and infrared sensors while lowering manufacturing thermal budget and protecting sensitive layers.

A protruding first-electrode layout blocks hydrogen diffusion to oxide TFT active layers, improving detector stability, leakage, and frame rate.