Light Detecting Pixel Layout Using 3D Isolation Regions
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In solid-state imaging devices, the miniaturization of pixels limits the arrangement of active elements such as transfer transistors and pixel transistors within the photoelectric conversion cell, particularly in in-pixel isolation regions, reducing the degree of freedom in their placement.
Innovation Solution
The implementation of a semiconductor layer with partitioned photoelectric conversion regions, isolation regions, and element formation regions allows for the arrangement of transfer transistors, charge holding regions, and pixel transistors in a way that increases the degree of freedom in their placement, including shared charge holding and contact regions between photoelectric conversion regions, and the use of conductive pads embedded in isolation regions to connect photoelectric conversion cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If pixels are miniaturized to increase the number of pixels for high image quality, then image quality is improved, but the degree of freedom in arrangement of active elements is reduced
Solution Approach 1:
The invention utilizes the thickness direction (vertical dimension) of the semiconductor layer to arrange active elements. Specifically, charge holding regions are positioned at different depths within the semiconductor layer, and transfer transistors are arranged to transfer charges vertically between these depth levels. This three-dimensional arrangement allows multiple active elements to coexist within a miniaturized pixel area without interfering with each other, thereby maintaining arrangement flexibility despite pixel miniaturization.
Solution Approach 2:
The invention nests multiple functional regions within the semiconductor layer thickness direction. The photoelectric conversion unit, charge holding regions, and transfer transistors are arranged in a nested configuration where charges are transferred vertically through the thickness direction from the photoelectric conversion unit to charge holding regions at different depths. This nesting approach maximizes the use of available space within miniaturized pixels while maintaining all necessary active elements.
2Adaptability or versatility
If active elements are arranged in the in-pixel isolation region, then arrangement flexibility is improved, but manufacturing complexity increases
Solution Approach 1:
The invention segments the semiconductor layer into distinct functional regions along the thickness direction: a photoelectric conversion unit region and charge holding regions at different depth levels. The in-pixel isolation region is also segmented into first and second isolation regions that separate different functional zones. This segmentation allows each region to be optimized for its specific function while simplifying the manufacturing process by providing clear spatial boundaries for element formation and isolation.
Solution Approach 2:
The invention applies different structural characteristics to different regions within the pixel. The in-pixel isolation regions are specifically positioned to provide electrical isolation where needed while allowing active elements to be arranged in other areas. The charge holding regions have specific depth positions and conductivity types tailored to their functional requirements, enabling flexible arrangement of active elements without compromising manufacturing feasibility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables the miniaturization of pixels while maintaining or improving the arrangement flexibility of active elements, enhancing the solid-state imaging device's performance and image quality.
Implementation Method 1
a photoelectric conversion unit and a transfer transistor, wherein the photoelectric conversion cell includes a first photoelectric conversion region and a second photoelectric conversion region provided adjacent to each other in plan view in the semiconductor layer
Data Source
AI summary
A light detecting device includes a semiconductor layer having a first surface and a second surface located on opposite sides to each other in a thickness direction, and a photoelectric conversion cell provided in the semiconductor layer and partitioned by a first isolation region. The photoelectric conversion cell includes a first photoelectric conversion region adjacent to a second photoelectric conversion region in plan view and each having a photoelectric conversion unit and a transfer transistor, a second isolation region arranged between the first photoelectric conversion region and the second photoelectric conversion region in plan view and extending in a thickness direction of the semiconductor layer, and an element formation region partitioned on the first surface side of the semiconductor layer by a third isolation region and provided with a pixel transistor. The element formation region extends over the first and second photoelectric conversion regions in plan view.