Stacked Semiconductor Layer Bonding to Minimize Thermal Warpage
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Solution Overview
Problem
Semiconductor devices experience thermal deformation such as warpage or shrink during subsequent thermal processes, particularly in stacked semiconductor devices, which can affect the reliability and performance of the devices.
Innovation Solution
The semiconductor device manufacturing method involves forming plugs in the substrates before bonding the upper and lower layers, which helps prevent thermal deformation by allowing for better thermal management and stress distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If multiple layers are stacked to achieve high integration, then the chip area is reduced, but thermal deformation such as warpage or shrink occurs during subsequent thermal processes
Solution Approach 1:
The patent applies preliminary action by forming plugs in the substrates before bonding the upper and lower layers. This pre-forming of plugs allows for better thermal management and stress distribution to be built into the structure before thermal processes occur, preventing warpage and shrink that would otherwise compromise the stacked device reliability
2Ease of manufacture
If substrates are bonded directly without pre-formed plugs, then the manufacturing process is simpler, but thermal deformation occurs affecting device reliability
Solution Approach 1:
The patent implements preliminary action by forming plugs in substrates before bonding. This pre-preparation of plugs in each substrate prior to bonding creates internal stress management structures that prevent thermal deformation during subsequent processing, thereby improving reliability without significantly complicating the overall manufacturing flow
Data Source
AI summary
The present disclosure relates to a semiconductor device manufacturing method that includes: forming a first layer including a first substrate, a first plug formed in the first substrate, a photodiode, and a first wiring layer; forming a second layer including a second substrate, a second plug formed in the second substrate, and a second wiring layer; forming a third layer including a third substrate and a third wiring layer; bonding the first wiring layer of the first layer to the second wiring layer of the second layer; and bonding the second substrate of the second layer to the third wiring layer of the third layer.