Array Substrate Active Layer Formation via Selective Deposition
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Solution Overview
Problem
The existing process for manufacturing thin film transistors often damages the semiconductor active layer during etching, and even with an etch stop layer, complete avoidance of damage is not possible, affecting the performance of the transistor.
Innovation Solution
The method involves forming a source electrode and a drain electrode on a gate insulating layer, creating an opening region in a photoresist layer to expose the gate insulating layer and parts of the electrodes, and then forming the active layer within this region, eliminating the need for etching the semiconductor material and ensuring good contact between the electrodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the semiconductor layer is etched to form the active layer, then the active layer can be formed in the channel region, but the active layer is damaged by the etching process
Solution Approach 1:
Instead of forming the active layer by etching away semiconductor material from a continuous layer, the patent inverts the approach by directly forming the semiconductor layer only in the desired active layer region through selective deposition. This avoids the harmful etching step while achieving the same structural outcome, thereby preserving active layer integrity while maintaining manufacturing precision.
Solution Approach 2:
The patent extracts the harmful etching step from the manufacturing process entirely. By using selective deposition to form the semiconductor layer only where needed, the method removes the etching operation that causes damage to the active layer, thus eliminating the source of reliability problems while still achieving precise active layer formation.
2Reliability
If an etch stop layer is formed on the semiconductor layer, then damage to the reserved semiconductor layer can be reduced, but damage cannot be completely avoided
Solution Approach 1:
The patent extracts and eliminates the etch stop layer from the process by avoiding etching entirely. Since the semiconductor layer is deposited selectively only in the active layer region, there is no need for an etch stop layer to protect the active layer during etching. This removes the additional layer and process steps, reducing device complexity while maintaining complete protection of the active layer.
Solution Approach 2:
Instead of adding protective layers (etch stop layer) before etching, the patent inverts the approach by using selective deposition to form the semiconductor layer only where needed from the beginning. This eliminates the need for protective etch stop layers while achieving the same goal of protecting the active layer, thereby reducing process complexity.
3Productivity
If the active layer is formed by etching the semiconductor layer, then the manufacturing process can be completed, but the active layer suffers from etching damage affecting transistor performance
Solution Approach 1:
The patent inverts the conventional sequence by forming the semiconductor layer selectively in the active layer region through targeted deposition rather than forming a continuous layer and then etching it. This maintains manufacturing efficiency by using standard deposition processes while eliminating etching damage, thus preserving transistor performance without sacrificing productivity.
Solution Approach 2:
The patent substitutes the mechanical etching process with a deposition-based approach. Instead of using etching chemistry to remove material and define the active layer, the method uses selective deposition to build the semiconductor layer only where needed. This replacement eliminates the damaging mechanical/chemical etching action while maintaining the ability to precisely define the active layer region, thereby preserving transistor performance while maintaining manufacturing efficiency.
Data Source
AI summary
An array substrate and a manufacturing method thereof, a display panel and a display device are provided. The array substrate manufacturing method comprises: forming a source electrode and a drain electrode on a gate insulating layer; forming photoresist above the gate insulating layer and the source electrode and the drain electrode; etching the photoresist to form an opening region so as to expose the gate insulating layer between the source electrode and the drain electrode, and a part of the source electrode and a part of the drain electrode; and forming an active layer in the opening region, the active layer covering the exposed gate insulating layer, the part of the source electrode and the part of the drain electrode.

