Array Substrate Binding Layout for Narrow-Border Displays
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Solution Overview
Problem
Existing display technologies face challenges in reducing the lower border width due to the need for both driving chips and flexible printed circuits to be bound on the display panel, with COG binding schemes being costly and difficult to further minimize the border width.
Innovation Solution
The array substrate design includes a driving chip binding region centrally positioned with flexible printed circuit binding regions on both sides, featuring a unique layout with isolation regions and solder joint groups to optimize wiring space, allowing for a narrower border design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If COG binding scheme is adopted with both driving chip and flexible printed circuit bound on the lower border, then the display panel can be assembled, but the lower border width cannot be further reduced
Solution Approach 1:
The patent transitions from a conventional linear arrangement of binding regions to a two-dimensional distributed arrangement. The flexible printed circuit binding region is positioned on both sides of the driving chip binding region in the second direction, creating a spatial redistribution that reduces the first direction width while maintaining all necessary connection functions.
Solution Approach 2:
The binding region is segmented into distinct functional zones: the driving chip binding region with first and second pads, and the flexible printed circuit binding region with multiple solder joints. This segmentation allows independent optimization of each zone's position and size, enabling the overall border width reduction while maintaining assembly feasibility.
2Length of stationary object
If the binding region width is reduced to achieve narrow border, then the screen-to-body ratio improves, but the wiring space becomes insufficient causing wiring difficulty and signal interference
Solution Approach 1:
The isolation region is introduced in the second direction between the first pad and the second solder joint group, utilizing the vertical dimension to separate wiring paths. This dimensional approach allows wires to be routed through the wiring region without interference while maintaining compact horizontal dimensions.
Solution Approach 2:
The isolation region acts as a mediator or buffer zone between the first pad and the second solder joint group. This intermediary structure provides dedicated wiring space that prevents signal interference while maintaining the compact overall layout, effectively resolving the wiring difficulty issue.
Data Source
AI summary
An array substrate, a display panel, and a display device. The array substrate includes a binding region, and the binding region includes a driving chip binding region and a flexible printed circuit binding region. The driving chip binding region is centrally distributed in the binding region, and the flexible printed circuit binding region is distributed on two sides of the driving chip binding region in a second direction. The driving chip binding region includes a first pad, a wiring region and a second pad sequentially distributed in the first direction. The first pad is arranged close to the first region. The second pad includes a second solder joint group and an isolation region, and the second solder joint group is located on two sides of the isolation region in the second direction.