Array Substrate Capacitor Merging Transistor Active Layer
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Solution Overview
Problem
Conventional display apparatuses, such as OLED displays, face limitations in aperture ratio due to the presence of thin film transistors and storage capacitors, which occupy significant area on the array substrate, thereby affecting display performance.
Innovation Solution
The array substrate design includes a base substrate with first and second thin film transistors, capacitor electrodes, and organic light emitting diodes, where the capacitor electrodes are strategically positioned to minimize area usage and enhance storage capacitance, thereby improving aperture ratio and display resolution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If conventional thin film transistors and storage capacitors are used in display apparatuses, then the display function is achieved, but the aperture ratio is reduced due to significant area occupation on the array substrate
Solution Approach 1:
The invention merges the storage capacitor function with the thin film transistor structure by using the source electrode or drain electrode as one electrode of the storage capacitor and the active layer as the other electrode. This integration eliminates the need for separate capacitor structures, thereby reducing area occupation and improving aperture ratio while maintaining both transistor switching function and charge storage function
Solution Approach 2:
The source electrode or drain electrode serves dual purposes: as an electrode for the thin film transistor switching operation and as an electrode for the storage capacitor function. The active layer similarly serves as both the conduction channel for the transistor and the other electrode for the storage capacitor, achieving multi-functionality and reducing overall device area
2Reliability
If conventional capacitor structures are used, then storage capacitance is provided, but parasitic capacitance increases and area is consumed
Solution Approach 1:
The storage capacitor is formed by integrating the capacitor electrodes with the transistor electrodes, specifically using the source electrode or drain electrode as one capacitor electrode and the active layer as the other electrode. This merging reduces parasitic capacitance by eliminating separate capacitor structures and their associated parasitic elements, while providing sufficient storage capacitance through the integrated design
Data Source
AI summary
The present application discloses an array substrate having a plurality of subpixel areas. The array substrate includes a base substrate; a plurality of first thin film transistors on the base substrate, each of which being in one of the plurality of subpixel areas; and a plurality of capacitor electrodes, each of which being in one of the plurality of subpixel areas. Each of the plurality of first thin film transistors includes a first active layer, a first gate electrode, a first source electrode, and a first drain electrode. The first active layer includes a first semi-conductive channel part, a first conductive part electrically connected to the first drain electrode, and a second conductive part electrically connected to the first source electrode. Each of the plurality of capacitor electrodes, the insulating layer, and the first conductive part constitute a first storage capacitor in one of the plurality of subpixel areas.


