Array Substrate Peripheral Circuit Area Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In the TFT-LCD industry, achieving a narrow frame configuration is hindered by the large area occupied by via holes and transparent electrodes needed for connecting gate and source/drain metal layer circuit lines in the peripheral circuit region, which prevents minimization of the display's frame size.
Innovation Solution
The array substrate design includes a base substrate with a pixel region and a peripheral circuit region, where the second circuit line is directly electrically connected to the first circuit line through a via hole penetrating the gate insulation layer, reducing the need for additional via holes and transparent electrodes, thereby minimizing the peripheral circuit area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If via holes and transparent electrodes are used to connect gate and source/drain metal layer circuit lines in the peripheral circuit region, then electrical connection between circuit lines is achieved, but the area occupied by peripheral circuits increases
Solution Approach 1:
The patent merges the gate electrode and first circuit line into a single conductive structure, and similarly merges the source/drain electrode and second circuit line. This consolidation eliminates the need for separate via holes and transparent electrodes to connect these components, thereby reducing the peripheral circuit area while maintaining electrical connectivity.
Solution Approach 2:
The gate electrode serves dual functions: as the gate control electrode for the transistor and as the first circuit line for signal transmission in the peripheral circuit region. Similarly, the source/drain electrode functions both as the transistor terminal and as the second circuit line. This multi-functionality reduces the number of additional components needed.
2Adaptability or versatility
If GOA technology is employed to prepare gate driving circuits on the array substrate, then external gate driving integral circuits can be omitted, but the peripheral circuit area increases due to required via holes and transparent electrodes
Solution Approach 1:
The patent combines the gate driving circuit functionality directly into the array substrate using the merged electrode-circuit line structures. By eliminating the need for via holes and transparent electrodes in the peripheral circuit region, the overall area required for integrated gate driving is reduced, making the GOA technology more area-efficient.
Data Source
AI summary
An array substrate including a base substrate is disclosed; the base substrate is divided into a pixel region and a peripheral circuit region, the pixel region sequentially includes a gate electrode, a gate insulation layer, a semiconductor active layer, a pixel electrode, a source/drain electrode, a passivation layer and a common electrode; the peripheral circuit region sequentially includes a first circuit line, the gate insulation layer, a second circuit line and the passivation layer. An orthogonal projection area of the second circuit line is at least partly overlapped with an orthogonal projection area of the first circuit line on the base substrate, and the second circuit line is directly electrically connected with the first circuit line through a via hole penetrating the gate insulation layer. A method for manufacturing the array substrate and a display device including the array substrate are also disclosed.