Array Substrate Common Electrode Cutting Holes for LCD Transmittance
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Solution Overview
Problem
Conventional array substrates for ADS-LCDs face challenges in driving liquid crystals between pixel electrodes, resulting in low transmittance and display delays due to weak electric fields at positions corresponding to gate and data lines.
Innovation Solution
The array substrate design includes a substrate with intersecting gate and data lines, a pixel electrode layer, a common electrode layer with cutting holes at positions corresponding to spaces between pixel electrodes, and insulating layers to enhance electric field formation and liquid crystal driving, thereby improving transmittance and reducing display delays.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional pixel electrode with slits is used to drive liquid crystals, then display function is achieved, but transmittance is low and display delay occurs due to weak electric fields at gate and data line positions
Solution Approach 1:
The common electrode is segmented by forming cutting holes at positions corresponding to the gate lines and data lines. This segmentation allows electric fields to be effectively formed at the previously weak field regions, enabling proper liquid crystal driving while improving transmittance and reducing display delay.
2Reliability
If a conventional pixel electrode with slits is used to drive liquid crystals, then display function is achieved, but display delay occurs due to weak electric fields at gate and data line positions
Solution Approach 1:
The common electrode is segmented by forming cutting holes at positions corresponding to the gate lines and data lines. This segmentation allows electric fields to be effectively formed at the previously weak field regions, enabling proper liquid crystal driving while improving transmittance and reducing display delay.
3Stability of the object's composition
If cutting holes are added to the common electrode layer, then electric field uniformity is improved, but manufacturing complexity increases
Solution Approach 1:
The common electrode is segmented by forming cutting holes at positions corresponding to the gate lines and data lines. This segmentation allows electric fields to be effectively formed at the previously weak field regions, enabling proper liquid crystal driving while improving transmittance and reducing display delay.
Solution Approach 2:
The common electrode is designed with a porous structure through the cutting holes, which allows the electrode to maintain its electrical function while creating regions for improved electric field distribution. This porous design achieves electric field uniformity without requiring completely complex structural changes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively drives liquid crystals between pixel electrodes, enhancing transmittance and reducing display delays by forming uniform electric fields through the use of cutting holes in the common electrode layer, addressing the limitations of conventional substrates.
Implementation Method 1
pixel electrodes and common electrodes are formed in an array substrate, and may generate a multi-dimensional electric filed for driving liquid crystals
Data Source
AI summary
The present invention provides an array substrate, a manufacturing method thereof and a display device, relates to the field of display technology. The array substrate comprises: a substrate; a gate metal layer comprising gate lines; a source and drain metal layer comprising data lines, the gate lines and the data lines intersecting with each other to define a plurality of sub-pixel areas; a pixel electrode layer provided on the substrate, which comprises a plurality of pixel electrodes which are in one-to-one correspondence with the plurality of sub-pixel areas; a common electrode layer provided on the substrate, which is provided with a plurality of cutting hole at positions corresponding to spaces between the pixel electrodes; a first insulating layer provided between the pixel electrode layer and the common electrode layer; and a second insulating layer provided between the gate metal layer and the source and drain metal layer.


