Array Substrate Common Electrode Connection via Shared Via Hole
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional array substrates for liquid crystal displays require via holes for connecting common electrodes with leading-out lines, increasing process complexity and potentially reducing display area transmittance.
Innovation Solution
The array substrate design connects common electrodes of multiple pixel units directly with a common electrode leading-out line through a connection line, either in the same layer or via holes, eliminating the need for individual via holes between each common electrode and line, thereby simplifying the manufacturing process and enhancing display performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If via holes are provided to connect each common electrode with the common electrode line, then electrical connection is achieved, but process complexity increases and display area transmittance decreases
Solution Approach 1:
The patent merges multiple via holes into a single shared via hole that serves multiple common electrodes simultaneously. Instead of providing individual via holes for each common electrode, the invention combines the connection paths, allowing one via hole to electrically connect multiple common electrodes to the common electrode line, thereby reducing overall structure complexity while maintaining reliable electrical connections.
Solution Approach 2:
The patent implements multi-functionality by designing a single via hole structure that performs the connection function for multiple common electrodes simultaneously. This universal via hole structure serves multiple purposes - connecting different common electrodes to the common electrode line without requiring separate connection structures for each electrode, thus reducing process complexity while ensuring reliable electrical connectivity.
2Reliability
If via holes are provided to connect common electrodes with leading-out lines, then electrical connection is established, but display area transmittance is reduced
Solution Approach 1:
The patent combines multiple via holes into a single shared via hole structure that serves multiple common electrodes. This merging reduces the total number of via holes required in the display area, thereby minimizing the cumulative area occupied by via holes and improving overall display area transmittance while maintaining necessary electrical connections.
Solution Approach 2:
The patent optimizes the spatial arrangement of the shared via hole structure by utilizing vertical layering and strategic positioning. The via hole is designed to extend through multiple layers and serve multiple electrodes from a single location, effectively using the vertical dimension to reduce the horizontal footprint in the display area, thereby preserving more light transmission area.
Data Source
AI summary
Embodiments of the present disclosure provide an array substrate and a display device. The array substrate has a display area and a non-display area and includes: a base substrate; a plurality of pixel units arranged in the display area on the base substrate and each comprising a common electrode and a pixel electrode; and a common electrode leading-out line provided in the non-display area on the base substrate; common electrodes of at least one row and/or column of pixel units are connected with one another and with the common electrode leading-out line.