Array Substrate Layout With Common Electrode Shielding Crosstalk
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Solution Overview
Problem
Traditional array substrates suffer from significant lateral parasite capacitance between data lines and pixel electrodes, leading to signal crosstalk that hampers the refresh rate and resolution of display devices.
Innovation Solution
The array substrate design includes a base substrate with a first metal layer for data lines, a second metal layer for gates and common electrodes, and a semiconductor layer with an active layer forming driving transistors, where the common electrode is positioned between the data line and pixel electrode to reduce parasitic capacitance, and the active layer, source, and drain are integrated to overlap with the gate, connected through a conductive via hole.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a data line is located between adjacent pixels to provide data signals, then data signal transmission is enabled, but lateral parasite capacitance between data line and pixel electrode increases causing signal crosstalk
Solution Approach 1:
An auxiliary electrode is introduced as an intermediary component between the data line and the pixel electrode. This auxiliary electrode acts as a shield that intercepts and redirects electric field lines, preventing direct capacitive coupling between the data line and pixel electrode. The auxiliary electrode is connected to a reference potential (ground or common electrode), creating an equipotential surface that reduces the voltage difference and thus the parasitic capacitance effect.
Solution Approach 2:
The harmful parasitic capacitance effect is extracted and isolated by introducing a separate auxiliary electrode structure. Instead of allowing direct interaction between the data line and pixel electrode, the auxiliary electrode captures the problematic electric field interactions, separating the harmful capacitive effect from the useful signal transmission path.
2Productivity
If data line is positioned between pixels for signal delivery, then pixel data reception is achieved, but signal crosstalk increases reducing refresh rate and resolution
Solution Approach 1:
The auxiliary electrode serves as a mediator that prevents harmful electromagnetic interference between the data line and pixel electrode. By introducing this intermediate shielding structure, signal integrity is maintained during high-speed data transmission, enabling higher refresh rates without compromising signal quality or introducing crosstalk artifacts.
3Object-affected harmful factors
If common electrode projection covers data line projection, then parasitic capacitance is reduced, but manufacturing complexity increases
Solution Approach 1:
The auxiliary electrode is merged with the existing common electrode structure, combining two functional elements into a single integrated component. This merging approach reduces the number of separate fabrication steps and material depositions required, thereby lowering manufacturing complexity while maintaining the parasitic capacitance reduction benefit.
Solution Approach 2:
The common electrode is designed to serve multiple functions: it provides the standard common electrode potential for liquid crystal modulation and simultaneously acts as an auxiliary shielding electrode to reduce parasitic capacitance. This multi-functionality eliminates the need for a separate auxiliary electrode layer, simplifying the overall device structure.
Data Source
AI summary
The present application provides an array substrate, a preparation method thereof, and a display device. The array substrate includes a base substrate, a first metal layer, a first insulation layer, a second metal layer, a second insulation layer, and a semiconductor layer. The first metal layer includes a data line, and the second metal layer includes a gate, a scanning line, and a common electrode. The gate is electrically connected to the scanning line. The semiconductor layer includes an active layer and a pixel electrode. The active layer includes a channel region, a source, and a drain, to overlap with the gate to form a driving transistor. The source is electrically connected to the data line through a conductive via hole, and the pixel electrode is electrically connected to the drain. The array substrate is able to effectively reduce parasitic capacitance, which facilitates to improve refresh rate and resolution.


