Array Substrate Cushion Layer Via Hole Depth
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Solution Overview
Problem
In low temperature poly-silicon panel manufacturing, irregular film surfaces on array substrates lead to poor liquid crystal alignment and risk of disconnection between pixel electrodes and source/drain due to thick insulation layers, which complicates contact and affects display performance.
Innovation Solution
The array substrate design includes a cushion layer under through holes, with a stepladder inner wall and reduced taper angle, allowing for increased contact area and reduced depth of through holes without altering the insulation layer thickness, ensuring stable connections between pixel electrodes and source/drain.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Shape
If the thickness of the insulation layer is increased to flatten the film surface, then the alignment performance of liquid crystal is improved, but the via hole depth increases making it easy for the insulation layer to separate from film layers, causing poor contact or disconnection between pixel electrode and source/drain
Solution Approach 1:
The invention introduces a cushion layer in the vertical dimension (thickness direction) to compensate for the deep via hole problem. By adding this intermediate layer, the effective via hole depth is reduced while the insulation layer thickness is maintained for flatness, thus resolving the contradiction between surface flatness and contact reliability.
Solution Approach 2:
The cushion layer acts as an intermediary element between the insulation layer and the underlying film layers. This intermediate structure provides mechanical support and reduces stress concentration at the via hole walls, preventing separation and ensuring reliable contact between the pixel electrode and source/drain.
2Reliability
If the thickness of the insulation layer is reduced to lower the risk of poor contact, then the contact between pixel electrode and source/drain is improved, but the flatness of the insulation layer is affected causing poor alignment of liquid crystal
Solution Approach 1:
By operating in the vertical dimension through the cushion layer, the invention decouples the relationship between insulation layer thickness and via hole depth. This allows the insulation layer to maintain its thickness for flatness while the cushion layer compensates for via hole depth issues, ensuring both flatness and contact reliability.
3Adaptability or versatility
If via holes are arranged in thick insulation layers, then connection between source/drain and pixel electrode is enabled, but the preparation procedure becomes complex and separation between insulation layer and film layers occurs easily
Solution Approach 1:
The cushion layer is formed in advance before the via holes are created. This preliminary action provides structural support that prevents separation during subsequent via hole formation and filling processes, simplifying the overall preparation procedure while ensuring reliable connectivity.
Data Source
AI summary
An array substrate and a liquid crystal display device comprising the array substrate are disclosed. The array substrate comprises a pixel unit having a thin film transistor region and a through-hole region. The pixel unit comprises a glass substrate, a first insulation layer, a second insulation layer, a third insulation layer, a fourth insulation layer, and a fifth insulation layer stacked from bottom up in sequence. In the thin film transistor region, the glass substrate is provided with a light-shading metal member that is covered by the first insulation layer, the first insulation layer is provided with an active layer that is covered by the second insulation layer, two ends of the active layer are respectively connected with a source and a drain formed between the third insulation layer and the fourth insulation layer, the second insulation layer is provided with a gate that is covered by the third insulation layer, and the fourth insulation layer is provided with a common electrode that is covered by the fifth insulation layer. In the through-hole region, a pixel electrode is arranged on the fifth insulation layer and a through hole is configured in the fourth insulation layer, so that the pixel electrode is connected with the source or the drain after passing through the fifth insulation layer. A cushion layer is arranged under the through hole in an insulated manner.