Array Substrate Data Line Routing for Display Transmittance
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Solution Overview
Problem
Display panels with array substrates suffer from poor display effects due to wide black shadow lines and reduced transmittance caused by excessive electric-field-free regions between sub-pixel regions, resulting from the placement of data lines between pixel electrodes.
Innovation Solution
The array substrate design places data lines on either side of sub-pixel regions in a row direction, eliminating the need for data lines between adjacent sub-pixel regions, allowing pixel electrodes to be closer and reducing electric-field-free regions, with comb-shaped sub-electrodes and optimized electrode arrangements to enhance electric field control and transmittance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If data lines are placed between pixel electrodes in sub-pixel regions, then electrical signals can be input to circuit structures, but electric-field-free regions are formed between adjacent sub-pixel regions causing wide black shadow lines and reduced transmittance
Solution Approach 1:
The patent changes the spatial arrangement of data lines from a vertical placement (between pixel electrodes in the same column) to a horizontal placement (along the row direction at the edge of sub-pixel regions). This dimensional change allows data lines to be positioned at different sides of adjacent sub-pixel regions, eliminating the formation of electric-field-free regions between them and resolving the contradiction between signal input capability and transmittance.
2Reliability
If data lines are positioned between adjacent sub-pixel regions, then circuit connectivity is achieved, but black shadow lines widen and display effect deteriorates
Solution Approach 1:
The patent segments the data line routing into separate paths for adjacent sub-pixel regions. Instead of using a single shared data line between regions, each sub-pixel region has its data line positioned at its own side, allowing independent routing that maintains circuit connectivity while avoiding the formation of wide black shadow lines in the display area.
3Device complexity
If pixel electrodes are positioned far apart to accommodate data lines, then data line routing is simplified, but electric-field-free regions increase and contrast ratio decreases
Solution Approach 1:
Instead of spacing pixel electrodes far apart to accommodate data lines in the traditional configuration, the patent inverts the approach by positioning data lines at the edges of sub-pixel regions in the row direction. This allows pixel electrodes to be positioned closer together while still providing adequate space for data line routing, thereby reducing electric-field-free regions and improving contrast ratio.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves display panel contrast ratio, transmittance, and overall display effect by minimizing electric-field-free regions and black shadow lines, leading to increased white-state brightness and contrast ratio while maintaining low black-state brightness.
Implementation Method 1
The pixel electrode and the common electrode may form an electric field to control a deflecting direction of liquid crystals in the liquid crystal layer
Data Source
AI summary
An array substrate is provided. The array substrate includes: a base substrate which is provided with a plurality of sub-pixel regions arranged in multiple rows and columns; a plurality of data lines located on the base substrate, each of the plurality of data lines corresponding to at least one of any column of the sub-pixel regions, any row of the sub-pixel regions including a plurality of sub-pixel region pairs, each of the plurality of sub-pixel region pairs including two adjacent sub-pixel regions, any two of the plurality of sub-pixel region pairs including different sub-pixel regions, and two data lines corresponding to the two sub-pixel regions being located at different sides of the two sub-pixel regions in a row direction; and a common electrode and a plurality of pixel electrodes located on the base substrate.