Array Substrate Hollow Electrode Layout for Lower Parasitic Capacitance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In display technologies, the overlapping region between a pixel electrode and a source or drain in panel displays generates parasitic capacitance, leading to a low charging rate and poor picture quality.
Innovation Solution
An array substrate with a hollow structure mounted on the transparent conductive layer in the overlapping region between the transparent conductive layer and the metal layer, reducing the overlapping area and thereby minimizing parasitic capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If the overlapping region between pixel electrode and source/drain is increased, then the parasitic capacitance is reduced, but the charging rate decreases and picture quality deteriorates
Solution Approach 1:
The patent extracts the harmful overlapping region between the pixel electrode and source/drain metal layers by introducing a hollow structure that removes the transparent conductive layer material from this specific area. This extraction reduces the parasitic capacitance formed in the overlapping region while preserving the necessary electrical connections through strategically positioned connection sections.
Solution Approach 2:
The patent applies local quality by creating a hollow structure with specific connection sections at predetermined positions. The transparent conductive layer is selectively removed only in the overlapping region while maintaining integrity in other areas. This localized modification reduces parasitic capacitance where harmful while preserving electrical connectivity where necessary.
2Object-affected harmful factors
If the overlapping region between pixel electrode and source/drain is increased, then the parasitic capacitance is reduced, but the picture quality deteriorates
Solution Approach 1:
The harmful overlapping region is extracted by removing the transparent conductive layer material in the overlap area through the hollow structure. This reduction in overlapping area directly decreases parasitic capacitance, thereby improving picture quality and display performance while maintaining necessary electrical connections.
Solution Approach 2:
The hollow structure with connection sections at predetermined positions enables local modification of the transparent conductive layer. By selectively removing material only in the harmful overlapping region while preserving it in functional areas, the patent improves picture quality without compromising electrical connectivity.
Data Source
AI summary
This application discloses an array substrate and a display panel. The array substrate includes a substrate, a plurality of active switches, and a transparent conductive layer. The active switches are formed above the substrate. The transparent conductive layer is formed above the active switches, and is connected to each of the active switches. Each of the active switches includes a metal layer. A hollow structure is mounted on the transparent conductive layer. The hollow structure is located in an overlapping region between the transparent conductive layer and the metal layer.