Array Substrate Integrating Pixel Electrode and Active Layer
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Solution Overview
Problem
The manufacturing process of traditional array substrates for liquid crystal displays is complex, requiring multiple patterning processes, leading to high costs and decreased yield due to alignment errors.
Innovation Solution
The array substrate design integrates the pixel electrode, active layer, and drain electrode into the same layer, reducing the number of patterning processes and improving alignment accuracy, using metal oxide semiconductor materials for these components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional multi-layer patterning processes are used to form gate electrodes, active layers, source electrodes and drain electrodes separately, then the structural precision of each component is improved, but the manufacturing complexity and number of patterning processes increase significantly
Solution Approach 1:
The patent merges the pixel electrode, active layer, and drain electrode into a single integrated structure formed by one patterning process. This combining approach reduces the total number of patterning steps while maintaining the functional integrity and structural precision of each component through careful design of the integrated layer configuration.
Solution Approach 2:
The patent creates a multi-functional layer that simultaneously serves as the pixel electrode, active layer, and drain electrode. This universal structure performs multiple functions that traditionally required separate components, thereby reducing manufacturing complexity while preserving the necessary structural precision through optimized material composition and geometric design.
2Manufacturing precision
If multiple separate patterning processes are used for different electrode and layer structures, then the alignment precision between components is improved, but the manufacturing cost and production time increase
Solution Approach 1:
By combining multiple patterning operations into a single integrated patterning process, the patent eliminates the need for repeated alignment operations. The unified approach maintains component alignment precision through inherent geometric relationships in the integrated structure while significantly improving manufacturing efficiency by reducing process steps and production time.
3Reliability
If traditional array substrate structures with separate layers are used, then the functional performance of each component is improved, but the manufacturing cost and process complexity increase
Solution Approach 1:
The patent combines multiple functional layers into an integrated structure that maintains the necessary electrical and optical functions of the thin film transistor. The merging is achieved through optimized material selection and geometric configuration that preserves functional performance while dramatically simplifying the manufacturing process and reducing production costs.
Solution Approach 2:
The integrated layer structure serves multiple functions simultaneously as pixel electrode, active layer, and drain electrode. This multi-functional design maintains the required transistor performance characteristics while enabling simpler, more cost-effective manufacturing processes compared to traditional multi-layer approaches.
Data Source
AI summary
An array substrate comprises a base substrate, a gate line, a data line and a thin film transistor arranged in an array on the base substrate, a pixel electrode and a passivation layer, the thin film transistor include a gate electrode, an active layer, a source electrode and a drain electrode, and the pixel electrode and the active layer, the drain are disposed in a same layer and formed integrally. A display device comprising the array substrate and a manufacturing method of the array substrate are further disclosed.