Array Substrate Metal Electrode Conductivity via Single Patterning

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Solution Overview

Problem

The performance of storage capacitors in array substrates is adversely affected due to the poor conductivity of semiconductor-based electrodes formed through ion doping, rather than using metal materials.

Innovation Solution

A method involving a single patterning process on both metal and semiconductor material films using a gray tone mask to form a metal-based first electrode of the storage capacitor, with ion doping creating source and drain contact regions opposite to each other, ensuring improved conductivity without damaging the gate insulating layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If ion doping is performed on semiconductor pattern to convert it to conductive material, then the semiconductor can serve as electrode, but the conductivity is poor compared to metal material

Engineering Contradiction:
Improveconductivity of storage capacitor electrodeVSAvoidprocess complexity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent combines the formation of metal film and semiconductor material film into a single structure, where the metal film is formed on the semiconductor material film. Through single patterning, both the active layer (from semiconductor) and the first electrode of storage capacitor (from metal) are formed simultaneously, improving electrode conductivity while maintaining process simplicity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The metal film is formed on the semiconductor material film before the patterning process. This preliminary formation of metal material ensures that when patterning occurs, the electrode regions will have high conductivity metal, resolving the conductivity issue before the actual electrode formation step.

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If multiple patterning processes are used to form metal electrode and semiconductor pattern separately, then precise control is achieved, but the number of processes increases

Engineering Contradiction:
Improvepattern formation precisionVSAvoidnumber of patterning processes
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent merges the patterning of metal film and semiconductor material film into a single patterning process. By forming both patterns simultaneously through one photolithography and etching sequence, the number of patterning processes is reduced while maintaining precise alignment between the active layer and storage capacitor electrode.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The single patterning process serves multiple functions: it defines the active layer pattern, defines the first electrode pattern, and ensures proper alignment between them. This multi-functional approach reduces process complexity while maintaining manufacturing precision.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the conductivity of storage capacitor electrodes, maintains the dielectric constant of the gate insulating layer, and reduces the number of patterning processes, thereby improving the overall performance of thin film transistors and storage capacitors.

Implementation Method 1

exposing and developing the photoresist layer through the gray tone mask so as to form a first photoresist retained region, a second photoresist retained region, and a photoresist completely removed region

Methodology Applied
Scientific EffectPhotoresist exposure and development: Photopolymerisation

Implementation Method 2

ion doping is performed on the semiconductor pattern so as to convert it from a semiconductor to a conductive material having a conductive property

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 3

a region of the metal thin film exposed by the photoresist completely removed region is over-etched by wet etching so as to form the first electrode of the storage capacitor

Methodology Applied
Scientific EffectWet etching:

Data Source

PatentUS10748944B2Array substrate comprising transistor and capacitor, manufacturing method therefor, display device
Publication Date: 2020.08.18 HEFEI BOE OPTOELECTRONIC TECH CO LTD
  • US10748944B2 patent drawing
  • US10748944B2 patent drawing
  • US10748944B2 patent drawing

AI summary

A method for manufacturing an array substrate, including: forming a semiconductor material film on a substrate, the method further including: forming a metal film covering the semiconductor material film; and performing a single patterning process on the metal film and the semiconductor material film to form an active layer, a semiconductor material remained pattern and a first electrode of a storage capacitor. The semiconductor material remained pattern is in a same layer as the active layer; and the first electrode of the storage capacitor is formed of the metal film and is on a side, away from the substrate, of the semiconductor material remained pattern. An array substrate and a display device are also provided.