Array Substrate Manufacturing via Metal Oxidation
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Solution Overview
Problem
The manufacturing process of display substrates using LTPO technology is complex and costly due to the high number of film forming and patterning processes required, which affects the production efficiency and performance of low-temperature poly-silicon and oxide thin film transistors.
Innovation Solution
A method for forming an array substrate that involves processing the same layer to create multiple electrodes and a dielectric layer, using oxidation treatments to oxidize specific portions of a metal layer, allowing for the formation of thin film transistors and dielectric layers in fewer steps, thereby simplifying the process and improving efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple separate film forming and patterning processes are used to manufacture LTPO display substrates, then the performance of low-temperature poly-silicon and oxide thin film transistors can be maintained, but the manufacturing complexity and cost increase significantly
Solution Approach 1:
The patent combines multiple separate film forming processes into a single integrated process. Specifically, it forms a multi-layer structure including low-temperature poly-silicon layer, oxide semiconductor layer, and electrode layers in one continuous manufacturing sequence, eliminating the need for separate protection layers and reducing the total number of patterning steps while maintaining transistor performance
Solution Approach 2:
The patent creates multi-functional layers that serve multiple purposes simultaneously. For example, the oxide semiconductor layer functions both as a semiconductor material and as a protective layer for the low-temperature poly-silicon transistor, while electrode layers serve dual roles as both electrodes and protective barriers, reducing the need for dedicated protection layers
2Reliability
If multiple separate film forming and patterning processes are used to manufacture LTPO display substrates, then the quality of thin film transistors can be ensured, but the production efficiency decreases
Solution Approach 1:
The patent merges multiple sequential manufacturing steps into fewer integrated processes. By forming the low-temperature poly-silicon transistor and oxide thin film transistor in an integrated sequence with shared layers and combined patterning steps, the total manufacturing time is reduced while maintaining transistor quality through controlled deposition and annealing processes
3Reliability
If a protection layer is formed to protect the low-temperature poly-silicon thin film transistor during heat treatment, then the transistor performance is preserved, but the number of manufacturing steps increases
Solution Approach 1:
The patent uses the oxide semiconductor layer as an intermediary that naturally protects the low-temperature poly-silicon transistor during heat treatment processes. This intermediary layer is formed as part of the normal device structure rather than as a separate protection layer, serving both functional and protective roles simultaneously
Solution Approach 2:
The protective function is merged into the functional oxide semiconductor layer itself, eliminating the need for separate dedicated protection layers. The oxide layer that is required for transistor operation also provides thermal protection during subsequent manufacturing steps
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method reduces the complexity and cost of the manufacturing process while maintaining the performance advantages of both low-temperature poly-silicon and oxide thin film transistors, enhancing the display quality by preventing adverse effects from heat treatment processes.
Implementation Method 1
performing a first oxidation treatment on the first portion of the metal layer so that the entire first portion of the metal layer is completely oxidized; performing a second oxidation treatment on the second portion of the metal layer
Data Source
AI summary
An array substrate and a manufacturing method thereof are disclosed. The method includes: forming a first thin film transistor which includes a first semiconductor layer, a first gate electrode, a first drain electrode and a first source electrode; forming a second thin film transistor which includes a second semiconductor layer, a second gate electrode, a second drain electrode and a second source electrode; and forming a dielectric layer which spaces the first semiconductor layer apart from the second semiconductor layer; the method further includes: processing the same layer to form at least one selected from the group consisting of the first gate electrode, the first drain electrode and the first source electrode, at least one selected from the group consisting of the second gate electrode, the second drain electrode and the second source electrode, and the dielectric layer by the same layer.