Array Substrate Single Patterning Process Multi-Tone Mask
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Solution Overview
Problem
The fabrication of array substrates for liquid crystal display devices requires multiple patterning processes, leading to a long fabrication cycle and high costs due to the complexity of forming gate insulating, active, and source-drain metal layers.
Innovation Solution
A single patterning process is used to form the gate insulating, active, and source-drain metal layers on a base substrate, employing a multi-tone mask to create the necessary patterns and electrical connections, thereby reducing the number of steps and increasing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple patterning processes are used to form gate insulating layer, active layer and source-drain metal layer, then manufacturing precision and structural integrity are maintained, but fabrication cycle lengthens and costs increase
Solution Approach 1:
The patent combines multiple patterning processes into a single patterning step by using a multi-tone mask that defines all necessary patterns (gate insulating layer, active layer, source-drain metal layer) simultaneously. This merging of processes maintains manufacturing precision while dramatically reducing the fabrication cycle from multiple sequential steps to one integrated step.
Solution Approach 2:
The multi-tone mask serves multiple functions: it patterns the gate insulating layer, active layer, and source-drain metal layer all in one exposure step. This universal patterning tool replaces what would traditionally require separate masks and exposure steps for each layer, thereby shortening the fabrication cycle while maintaining the required structural integrity.
2Manufacturing precision
If multiple patterning processes are used to form gate insulating layer, active layer and source-drain metal layer, then structural integrity is maintained, but fabrication cost increases
Solution Approach 1:
By merging multiple patterning processes into a single step using a multi-tone mask, the patent reduces the number of expensive process steps required. This approach maintains the structural integrity of the formed layers while lowering fabrication costs by eliminating redundant process steps and reducing overall manufacturing complexity.
3Productivity
If a single patterning process is used to form gate insulating layer, active layer and source-drain metal layer, then fabrication cycle is shortened, but process complexity increases
Solution Approach 1:
The multi-tone mask acts as an intermediary tool that enables single-step patterning of multiple layers. This specialized mask contains multiple tone regions (different optical densities) that allow simultaneous formation of gate insulating layer, active layer, and source-drain metal layer patterns in one exposure step, thereby shortening the fabrication cycle while managing process complexity through a dedicated patterning solution.
4Ease of manufacture
If photoresist thickness is different across regions, then selective etching is enabled for different layers, but photoresist application complexity increases
Solution Approach 1:
The patent applies local quality by creating different photoresist thicknesses in different regions of the substrate. The multi-tone mask exposes areas with different optical densities, resulting in varying photoresist thicknesses that enable selective etching for different layers (gate insulating layer, active layer, source-drain metal layer). This localized variation in photoresist properties allows precise control over which layers are etched in which regions, facilitating complex device fabrication.
Solution Approach 2:
The patent changes the photoresist thickness parameter across different regions of the substrate to achieve selective etching. By controlling the exposure dose and photoresist thickness variations, the process enables different etch selectivities for different layers, allowing the gate insulating layer, active layer, and source-drain metal layer to be patterned differently in various regions while managing application complexity through parameter control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly shortens the production cycle and reduces fabrication costs while maintaining the necessary structural and electrical integrity for display pixel regions, connection regions, and isolation regions.
Implementation Method 1
exposing and developing the base substrate provided with photoresist by using a multi-tone mask to form a first photoresist-reserved-portion, a second photoresist-reserved-portion, a third photoresist-reserved-portion
Data Source
AI summary
Embodiments of the present disclosure provide an array substrate and a fabrication method thereof, and a display device. The fabrication method of the array substrate includes: forming a gate metal layer, a gate insulating layer, an active layer and a source-drain metal layer on a base substrate. The forming the gate insulating layer, the active layer and the source-drain metal layer on the base substrate comprises: forming a gate insulating film, an active layer film and a source-drain metal film on the base substrate; forming the gate insulating layer, the active layer and the source-drain metal layer by a single patterning process. The number of the exposing process is reduced, the production cycle is shortened and the fabrication cost is reduced.