Array Substrate Signal Line Layout for Narrow LCD Bezels

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Solution Overview

Problem

The existing gate driver less (GDL) technology in liquid crystal displays (LCDs) results in wider panel frames due to the requirement for wider signal lines, making it difficult to design narrow frames.

Innovation Solution

The array substrate includes a display area, a gate driving circuit area, and a signal line area with multiple metal layers, where first and second signal lines are connected through overlapping metal layers, allowing for reduced horizontal width by overlapping signal lines in space, thereby minimizing the panel frame width.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of stationary object

If signal lines are arranged in separate metal layers without overlapping, then signal transmission reliability is improved, but the horizontal width of signal lines increases resulting in wider panel frames

Engineering Contradiction:
Improvehorizontal width of signal linesVSAvoidsignal transmission reliability
Core Design Contradiction:
Length of stationary objectVSReliability

Solution Approach 1:

The patent applies three-dimensional stacking of signal lines across multiple metal layers (first, second, and third metal layers) to reduce the horizontal footprint. Signal lines are arranged in different layers with vertical connections via contact holes, transforming a two-dimensional layout problem into a three-dimensional structure. This allows the same signal transmission function to be achieved with reduced horizontal width, directly resolving the contradiction between compact width and transmission reliability.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent implements nested arrangement where signal lines in lower metal layers are positioned beneath signal lines in upper metal layers, creating a nested vertical structure. The first signal lines are arranged below second signal lines, which are arranged below third signal lines, with each layer nested within the horizontal projection of the layers above. This nesting approach maximizes space utilization and reduces the overall horizontal width while maintaining separate transmission paths for reliability.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Length of stationary object

If multiple metal layers with overlapping signal lines are used, then the horizontal width of signal lines is reduced, but the device complexity increases

Engineering Contradiction:
Improvehorizontal width of signal linesVSAvoidsignal line structure complexity
Core Design Contradiction:
Length of stationary objectVSDevice complexity

Solution Approach 1:

The patent divides the signal transmission function into multiple discrete metal layers (first, second, and third metal layers), each containing specific signal lines. This segmentation allows independent design and optimization of each layer, making the complex multi-layer structure more manageable. Each layer can be processed and connected separately through contact holes, reducing the overall complexity compared to a single-layer design attempting to accommodate all signals.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent creates a universal multi-layer metal structure that serves multiple functions simultaneously: signal transmission, electrical connection between layers, and space optimization. The contact holes serve both as connection pathways and as alignment references. The insulating layers provide both electrical isolation and structural support. This multi-functionality reduces the need for additional specialized components, thereby managing complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If signal lines are made wider to ensure reliable signal transmission, then signal transmission quality is improved, but the panel frame width increases making narrow frame design difficult

Engineering Contradiction:
Improvesignal transmission qualityVSAvoidpanel frame width
Core Design Contradiction:
ReliabilityVSLength of stationary object

Solution Approach 1:

The patent moves signal transmission from a two-dimensional planar arrangement to a three-dimensional multi-layer structure. By distributing signal lines across multiple metal layers stacked vertically, the horizontal width requirement is significantly reduced. Each signal line maintains adequate width for reliable transmission within its layer, while the vertical stacking allows multiple signals to coexist without requiring proportionally wider horizontal space, thus enabling narrow frame designs.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent merges multiple signal transmission functions into a compact multi-layer structure where first, second, and third signal lines are combined in vertical proximity. The insulating layers and contact holes are merged into an integrated structure that provides both electrical isolation and mechanical support. This merging approach achieves reliable signal transmission for multiple signals within a reduced horizontal footprint, directly addressing the contradiction between transmission quality and frame width.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20230369347A1Array substrate, method for manufacturing array substrate and display device
Publication Date: 2023.11.16 HKC CORP LTD
  • US20230369347A1 patent drawing
  • US20230369347A1 patent drawing
  • US20230369347A1 patent drawing

AI summary

Disclosed are an array substrate, a method for manufacturing an array substrate and a display device. The array substrate includes a display area, a gate driving circuit area and a signal line area. The display area is provided with a plurality of pixels. The gate driving circuit area is provided with a gate driving circuit for driving the pixels. The signal line area is provided with a plurality of signal lines for providing driving signals for the gate driving circuit. The signal line area includes a plurality of first metal layers and at least one second metal layer. The signal lines include a plurality of first signal lines and a plurality of second signal lines. The first signal lines are for accessing the driving signals and the second signal lines are for transmitting the driving signals to the gate driving circuit.